Aligned Field Plate Structure for RF Transistor Capacitance Control
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Solution Overview
Problem
Conventional methods struggle to maintain precise control of field plate alignment and dimensions in high-power field effect transistors (FETs), particularly at high frequencies, hindering efficient high-voltage operation and high-volume manufacturing.
Innovation Solution
A self-aligned fabrication method for field plates using a sidewall spacer as a hard mask during etching, eliminating the need for conventional photolithography, ensuring precise alignment and dimension control of the field plate relative to the gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography methods are used to form field plates, then the fabrication process is simpler and more established, but alignment precision and dimension control of field plates deteriorate at high frequencies
Solution Approach 1:
The field plate structure is self-aligned to the gate through the formation of mandrels and dielectric layers that automatically position the field plate relative to the gate, eliminating the need for separate alignment steps and conventional photolithography processes
Solution Approach 2:
Mandrels and dielectric layers are formed in advance before the field plate metal is deposited, pre-establishing the precise geometric relationships and dimensions that will define the final field plate structure and its alignment to the gate
2Strength
If field plate length is increased to improve breakdown voltage, then high-voltage operation is enhanced, but alignment tolerance requirements become more stringent and manufacturing difficulty increases
Solution Approach 1:
The field plate length and position are defined by the dimensions of previously formed dielectric layers and mandrels, transferring the dimensional control to earlier process steps where tighter control is more achievable, rather than relying on final alignment steps
3Reliability
If conventional alignment methods are used, then the fabrication process is more established, but reproducibility and manufacturability at high volumes deteriorate
Solution Approach 1:
The self-aligned structure inherently ensures consistent positioning of the field plate relative to the gate across all devices, improving reproducibility without requiring complex alignment procedures that would complicate high-volume manufacturing
Data Source
AI summary
A transistor device includes a semiconductor substrate and a gate structure at the upper surface of the substrate. The gate structure is non-planar and includes a metal gate electrode with first and second sidewalls. A first dielectric layer is present over the gate structure. The first dielectric layer includes a first portion that overlies the first sidewall and a second portion that overlies the second sidewall. A portion of a conductive layer over the first dielectric layer forms a field plate with a first portion proximate to the second sidewall of the gate structure. A dielectric sidewall spacer on the first portion of the field plate is formed from a portion of a second dielectric layer, and the dielectric sidewall spacer does not contact the first dielectric layer.