Aligned Solar Cell Metallization to Minimize IBC Shunting
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Solution Overview
Problem
Current solar cell manufacturing techniques face challenges in achieving high efficiency while minimizing manufacturing costs and reducing the risk of current leakage or shunting, particularly in interdigitated back contact (IBC) solar cell architectures.
Innovation Solution
The implementation of aligned metallization structures with spatially confined emitter regions and precise alignment of conductive contacts using laser ablation and selective removal processes to minimize the area of high-lifetime p+ emitter regions, thereby reducing the risk of shunting and enhancing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional metallization techniques are used for IBC solar cells, then manufacturing is simpler, but current leakage and shunting risk increase
Solution Approach 1:
The metallization structure is segmented into multiple discrete components: separate p-type and n-type contact regions, distinct emitter regions, and isolated conductive paths. This segmentation prevents current leakage by ensuring that conductive paths for different polarities do not intersect or short-circuit, while maintaining manufacturing feasibility through systematic patterning processes
Solution Approach 2:
Different regions of the solar cell are assigned different local properties: p-type doping in specific contact regions, n-type doping in other regions, selective metal deposition patterns, and varied insulator thicknesses. This local differentiation allows each region to perform its specific function optimally while preventing unwanted current paths, resolving the contradiction between reliability and complexity
2Reliability
If larger emitter regions are used, then current collection is improved, but shunting risk and manufacturing cost increase
Solution Approach 1:
Emitter regions are pre-defined and pre-doped in specific patterns before metallization deposition. The p-type and n-type emitter regions are created with precise spatial confinement and alignment, establishing safe current collection paths before the metallization layer is added. This preliminary structuring prevents shunting while optimizing current collection, eliminating the need for larger, riskier emitter areas
Solution Approach 2:
Traditional mechanical or chemical masking methods for defining emitter regions are replaced with precision laser ablation and photolithography techniques. These advanced patterning methods achieve sub-micron alignment accuracy, allowing small emitter regions to be precisely positioned and sized, thereby preventing shunting while maintaining manufacturing efficiency through automated, high-precision processes
3Productivity
If more passivation area is maximized, then efficiency improves, but manufacturing precision requirements increase
Solution Approach 1:
A multi-layer insulating structure serves as an intermediary between the semiconductor substrate and the metallization layers. This insulator layer, with its precisely controlled thickness and material properties, provides both electrical isolation and a reference plane for alignment. It mediates the positioning of p-type and n-type contact regions, enabling maximized passivation area while maintaining achievable manufacturing precision through the insulator's physical and electrical characteristics
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in high-efficiency solar cells with maximized passivation area and reduced manufacturing costs by precisely aligning conducting holes on spatially confined emitter regions, minimizing shunting, and improving carrier lifetime.
Implementation Method 1
A second plurality of discrete openings is formed in the insulating layer using a laser ablation process
Data Source
AI summary
Aligned metallization approaches for fabricating solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a semiconductor layer over a semiconductor substrate. A first plurality of discrete openings is in the semiconductor layer and exposes corresponding discrete portions of the semiconductor substrate. A plurality of doped regions is in the semiconductor substrate and corresponds to the first plurality of discrete openings. An insulating layer is over the semiconductor layer and is in the first plurality of discrete openings. A second plurality of discrete openings is in the insulating layer and exposes corresponding portions of the plurality of doped regions. Each one of the second plurality of discrete openings is entirely within a perimeter of a corresponding one of the first plurality of discrete openings. A plurality of conductive contacts is in the second plurality of discrete openings and is on the plurality of doped regions.