Fully Aligned Via Interconnects for Semiconductor Reliability
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Solution Overview
Problem
The semiconductor industry faces challenges in fabricating fully aligned metal line interconnects due to overlay errors during lithography, which can lead to reliability issues such as electromigration and time-dependent dielectric breakdown, especially as device sizes shrink and interconnect dimensions become more critical.
Innovation Solution
A method for fabricating a fully aligned via structure by forming a first and second metal line in a first interlayer dielectric, a cap covering these lines, and a second interlayer dielectric, with a via that self-aligns to both the first and third metal lines, using techniques like etching and selective deposition to ensure precise alignment and minimize overlap.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If advanced masks with phase-shifting and optical proximity correction are employed, then lithography process latitude is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent segments the via formation process into multiple steps: forming mandrels at a first pitch, selectively removing portions, and forming vias at a second pitch. This segmentation allows standard lithography to achieve precision that would otherwise require complex phase-shifting masks, thereby improving manufacturability while reducing mask complexity
Solution Approach 2:
The patent performs preliminary actions by forming mandrels and selectively removing portions before final via formation. This preliminary structuring enables self-alignment and reduces the need for complex real-time lithography corrections, improving process latitude without requiring advanced masks
2Manufacturing precision
If overlay error is minimized by reworking lithography, then alignment precision is improved, but manufacturing time and cost increase
Solution Approach 1:
The patent implements self-alignment mechanisms where the via formation process automatically aligns to the underlying metal lines through the selective removal and mandrel structure. This self-service alignment eliminates the need for time-consuming lithography rework, achieving high overlay precision while maintaining efficient manufacturing throughput
3Duration of action of stationary object
If via and line intersection is reduced to minimize material, then electromigration lifetime is improved, but manufacturing precision requirements increase
Solution Approach 1:
The self-alignment mechanism ensures that vias are precisely positioned relative to metal lines without requiring excessive overlap. This achieves the dual benefit of minimizing material usage while maintaining manufacturing precision through automatic alignment, thereby extending electromigration lifetime
Solution Approach 2:
By preliminarily forming mandrels and selectively removing portions, the patent establishes precise geometric relationships before via formation. This preliminary structuring ensures optimal via-line intersection geometry that minimizes material while maintaining alignment precision, improving electromigration resistance
Data Source
AI summary
A structure having fully aligned via connecting metal lines on different Mx levels. The structure may include a first metal line and a second metal line in a first ILD, a cap covering the first ILD, the second metal line and a portion of the first metal line, a second ILD on the cap, and a via that electrically connects the first metal line to a third metal line, wherein the third metal line is above the first metal line and runs perpendicular to the first metal line, the via is fully aligned to the first metal line and the third metal line, and the via electrically connects the first metal line to the third metal line.