Alignment Bumps for Pick-and-Place IC Handling
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Solution Overview
Problem
The existing methods for producing integrated circuits face challenges in reliably picking up small integrated circuits from a film frame carrier due to tolerances in gap generation, leading to misalignment issues with the pick-and-place system, especially when using narrow saw lines or laser-dicing techniques.
Innovation Solution
Incorporating alignment bumps on some integrated circuits as optical marks that do not contact the electric circuits, allowing the pick-and-place system to align and accurately pick up working integrated circuits using these bumps, which are detected by sensors to ensure correct placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If narrow saw lines or laser-dicing are used to separate integrated circuits, then manufacturing precision is improved, but the reliability of the pick-and-place system deteriorates due to gap tolerance misalignment
Solution Approach 1:
The patent introduces alignment bumps as intermediary reference elements between the integrated circuits and the pick-and-place system. These bumps serve as mediators that enable precise alignment without requiring the pick-and-place system to directly reference the narrow saw lines or generated gaps, thus resolving the contradiction between narrow saw lines and reliable picking
Solution Approach 2:
The alignment bumps create optical copies or references of the integrated circuit positions that are independent of the physical gap dimensions. The pick-and-place system aligns to these optical references rather than relying on physical gap measurements, eliminating the tolerance issues associated with narrow saw lines
2Ease of operation
If the foil of the film frame carrier is stretched to generate gaps between integrated circuits, then the pick-and-place system can access the integrated circuits, but manufacturing precision deteriorates due to tolerance-induced misalignment
Solution Approach 1:
The alignment bumps act as intermediary reference markers that decouple the pick-and-place alignment process from the physical gap dimensions. The system aligns to the bumps rather than measuring gaps, allowing the foil to be stretched for accessibility without compromising alignment precision
3Productivity
If integrated circuits are made relatively small, then productivity is improved, but the reliability of the pick-and-place system deteriorates due to increased sensitivity to alignment errors
Solution Approach 1:
The alignment bumps create scalable optical references that maintain their effectiveness regardless of integrated circuit size. Even as circuits are miniimized to increase density, the bumps provide robust alignment references that are not proportionally scaled down, maintaining picking reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability of the pick-and-place system by enabling precise alignment and accurate picking up of integrated circuits, reducing errors and improving the efficiency of the process, especially for small integrated circuits.
Implementation Method 1
automatically picking up the working integrated circuits from the film frame carrier utilizing a pick-and-place system which is aligned utilizing the alignment bumps of the first integrated circuits
Data Source
AI summary
Integrated circuits (Ia, Ib) on a wafer (2) comprise first and second integrated circuits (Ia, Ib) which each include an electric circuit (3). Only the first integrated circuits (Ia) comprise each at least one bump (8) not contacting their relevant electric circuits (3).