Dual-Function Alignment Structures for Etch Bias and Layer Monitoring
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Solution Overview
Problem
Current semiconductor manufacturing processes require multiple alignment marks and complex structures for positional alignment, increasing complexity and cost, and struggle to detect alignment/misalignment, layer over-etch precision, and intra-wafer distortion effectively.
Innovation Solution
The development of alignment and etch bias structures that utilize dual functioning shapes with partially overlapping or orthogonal edges, capable of showing changes in X, Y, and rotation, enabling single alignment/monitor patterns for multiple layers, in-situ post-fabrication characterization, and detection of alignment quality, layer precision, and intra-layer characteristics, with built-in redundancy for robustness and resolution below minimum feature size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple alignment marks are used for different alignment functions, then alignment precision is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple alignment mark types (precision alignment marks, course alignment marks, and characterization alignment/monitoring marks) into a single dual-functioning alignment and etch bias structure. This single structure performs all three alignment functions simultaneously, eliminating the need for separate marks and reducing overall device complexity while maintaining alignment precision.
Solution Approach 2:
The alignment and etch bias structure is designed with multi-functionality to serve as precision alignment marks, course alignment marks, and characterization alignment/monitoring marks all at once. This universal structure can be read by exposure systems during layer fabrication and also used for post-fabrication characterization, replacing multiple specialized marks with one versatile structure.
2Measurement precision
If multiple alignment marks are used for different alignment functions, then alignment precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges multiple alignment marks into a single dual-functioning structure, reducing the total number of lithography steps and fabrication processes required. This consolidation decreases manufacturing complexity and associated costs while maintaining the precision alignment capabilities that would otherwise require multiple separate marks.
Solution Approach 2:
The universal alignment and etch bias structure performs multiple functions (precision alignment, course alignment, and characterization) that previously required separate marks. This multi-functionality reduces the number of fabrication steps needed, thereby lowering manufacturing costs while preserving alignment precision.
3Measurement precision
If traditional alignment marks are used, then alignment detection is possible, but detection of layer over-etch precision and intra-wafer distortion is limited
Solution Approach 1:
The alignment and etch bias structure is designed to perform multiple detection functions: it can detect alignment/misalignment quality, layer over-etch precision, intra-wafer intra-PCB distortion, and intra-layer dielectric characteristics. This versatile structure replaces traditional alignment marks that could only detect alignment, enabling comprehensive process monitoring with a single structure.
Solution Approach 2:
The structure enables in-situ post-fabrication characterization by providing feedback on multiple process parameters including alignment quality, etch precision, and wafer distortion. This feedback capability allows for real-time process monitoring and adjustment, enhancing detection versatility beyond simple alignment detection.
4Measurement precision
If alignment marks are designed to detect features below minimum feature size, then detection precision is improved, but manufacturing complexity increases
Solution Approach 1:
The patent uses overlapping shapes on multiple patterned layers (at least two layers) to create alignment and etch bias structures. By utilizing the vertical dimension (multiple layers) and spatial overlap, the structure can detect features and variations below the minimum feature size without requiring smaller lithographic features, thus maintaining detection precision without increasing pattern complexity.
Solution Approach 2:
The dual-functioning alignment and etch biasing shapes include at least three partially overlapping shapes on at least two patterned layers. The overlapping shapes are arranged such that they nest within each other spatially, creating a compact structure that can detect sub-minimum feature size variations through their relative positions and overlaps without requiring additional complex patterning.
Data Source
AI summary
Alignment and etch bias structures are provided that accomplish (I) a single alignment/monitor pattern for multiple layers, (II) the functions of precision alignment marks, course alignment marks, and characterization alignment/monitoring marks, (III) in-situ post fabrication characterization by at least two methods, optical and electrical (e.g., capacitance) with one pattern, and (IV) detects not only alignment/misalignment quality, but also layer over-etch precision, intra-wafer intra printed circuit board (PCB) distortion, and intra-layer dielectric characteristics.