Alignment Mark Protection in Semiconductor Devices
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Solution Overview
Problem
The existing methods for forming through-silicon via in semiconductor devices face errors in recognizing alignment marks due to dopant diffusion, leading to complex mask designs and prolonged development periods, as the dopant doped into the silicon substrate can diffuse infrared light, causing improper alignment.
Innovation Solution
The alignment mark is positioned within an area completely covered by an insulator in the element isolation region, preventing dopant diffusion and allowing accurate infrared recognition without complex mask designs, as the insulator layer extends to cover the alignment mark, ensuring the infrared passes through without being diffused by dopant-doped dummy active regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dopant is doped into the silicon substrate near the alignment mark, then the dopant can be effectively implanted for semiconductor element formation, but the dopant diffuses infrared light causing errors in alignment mark recognition
Solution Approach 1:
The substrate surface is divided into element forming regions (where dopant is implanted) and element isolation regions (where alignment marks are formed). This spatial segmentation prevents dopant diffusion to alignment marks while maintaining effective dopant implantation in semiconductor elements, resolving the contradiction between reliable alignment recognition and functional dopant implantation
Solution Approach 2:
Different regions of the substrate are given different properties: element forming regions receive dopant implantation for semiconductor element creation, while element isolation regions remain free of dopant to maintain infrared transparency for alignment mark recognition. This local differentiation allows both functions to coexist without interference
2Reliability
If a resist is formed above the alignment mark to prevent dopant diffusion, then alignment mark recognition accuracy improves, but the mask design becomes very complex and requires different resist patterns for each dopant implantation
Solution Approach 1:
The substrate is segmented into element isolation regions where alignment marks are formed and element forming regions where semiconductor elements are created. This segmentation eliminates the need for complex resist patterns over alignment marks during dopant implantation, as the alignment marks are inherently protected by their location in dopant-free isolation regions
Solution Approach 2:
The element isolation regions are established beforehand with insulator formation, creating protected zones for alignment marks before dopant implantation begins. This preliminary structuring prevents the need for repeated resist formation and complex mask designs for each subsequent dopant implantation step
3Reliability
If the trench in STI method is made wide to ensure proper isolation, then element separation is improved, but dishing occurs where the center of the insulating film is lowered due to planarization
Solution Approach 1:
The insulating film structure is made non-uniform with local variations: wider insulator regions in element isolation areas provide effective element separation, while localized dummy patterns (islands of base material exposure) are introduced specifically in the insulator layer to counteract dishing during planarization, thus maintaining both separation effectiveness and surface planarity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach suppresses errors in recognizing alignment marks, simplifies mask design, and allows for proper alignment of through-silicon via, reducing the risk of prolonged development periods by ensuring accurate infrared recognition and alignment without the need for complex resist formation in every dopant implantation process.
Implementation Method 1
the insulator layer extends to cover the alignment mark, ensuring the infrared passes through without being diffused by dopant-doped dummy active regions
Implementation Method 2
infrared is radiated from the rear surface side of the semiconductor substrate so as to recognize an alignment mark formed on the element forming surface of the semiconductor substrate by receiving the reflected light or transmission light
Data Source
AI summary
A semiconductor device includes a semiconductor substrate having a first surface, which includes an element forming region and an element isolation region, and a second surface opposite to the first surface, a semiconductor element formed on the semiconductor substrate in the element forming region, an insulator formed on the semiconductor substrate in the element isolation region, a first wiring layer formed on the first surface of the semiconductor substrate, the first wiring layer being connected to the semiconductor element, an alignment mark formed on the semiconductor substrate in the element isolation region, the entire alignment mark overlapping with the insulator in a plan view of the semiconductor device, and a second wiring layer formed on the second surface of the semiconductor substrate.


