Alignment Pattern Structure for Precise Lithography Overlay Measurement

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Solution Overview

Problem

The semiconductor industry faces challenges in accurately determining overlay errors between photo resist layout patterns and underlying layout patterns during lithography operations, which affect device density and precision in nanometer technology process nodes.

Innovation Solution

A method is employed to measure overlay errors by irradiating overlapping alignment patterns with a coherent light beam, analyzing diffracted light reflections, and using an analyzer module to calculate positional shifts between alignment patterns, allowing for precise determination of overlay errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional lithography methods are used, then device density can be increased, but overlay error measurement precision deteriorates

Engineering Contradiction:

Improveoverlay error measurement precisionVSAvoidmeasurement system complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces alignment patterns as intermediary features that are specifically designed for overlay measurement. These patterns serve as mediators between the lithography process and the measurement system, enabling precise overlay error determination without requiring complex direct measurement of the actual device structures.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces direct mechanical or optical measurement of overlay errors with an optical diffraction-based measurement system. By using coherent light sources and analyzing diffracted light patterns, the system achieves high precision overlay measurement without complex mechanical positioning or direct physical measurement mechanisms.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If alignment patterns are used for overlay measurement, then overlay error determination accuracy is improved, but measurement time increases

Engineering Contradiction:

Improveoverlay error determination accuracyVSAvoidmeasurement time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements continuous overlay measurement during the lithography process by incorporating alignment patterns into the standard lithography workflow. The measurement and analysis of diffracted light patterns occur continuously as part of the fabrication process, eliminating separate measurement steps and reducing overall process time.

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The alignment patterns serve dual purposes: they are both used for overlay measurement and are integrated into the lithography process itself. The system measures overlay errors using the same optical infrastructure already present in the lithography tool, making the measurement process self-contained and eliminating the need for separate, time-consuming measurement equipment.

Inventive Principle:

Principle #25Self-service

3Measurement precision

If multiple alignment patterns are measured, then overlay error comprehensive accuracy is improved, but system complexity increases

Engineering Contradiction:

Improveoverlay error comprehensive accuracyVSAvoidmeasurement system complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent designs alignment patterns that can be measured using a universal optical diffraction system. The same coherent light source and detector setup used for single-pattern measurement can analyze multiple patterns by simply moving the measurement stage across different locations on the wafer, eliminating the need for multiple specialized measurement systems.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables accurate measurement of overlay errors, ensuring that only patterns within a specified threshold are used for further processing, thereby improving device density and precision in semiconductor manufacturing.

Implementation Method 1

irradiating overlapping alignment patterns with a coherent light beam, analyzing diffracted light reflections

Methodology Applied

Scientific EffectDiffraction: Diffraction

Data Source

PatentUS20250362583A1Structure and method of signal enhancement for alignment patterns

Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

In a layout alignment method of a lithographic system for semiconductor device processing, a reference pattern that is included in a reference pattern module is disposed over an alignment pattern of a substrate. The alignment pattern includes two or more sub-patterns that extend in a first interval along a first direction and are arranged with a first pitch in a second direction. Each sub-pattern includes first patterns and second patterns. A width of the first pattern is at least twice as wide as a width of the second pattern. The reference pattern at least partially overlap with the alignment pattern. An overlay alignment error between the reference pattern and the alignment pattern of the substrate is determined. When the overlay alignment error is not more than a threshold value, a photo resist pattern is produced on the substrate based on the layout pattern associated with reference pattern.