All-Level Coarse and Fine Memory Cell Programming
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Solution Overview
Problem
Existing memory programming techniques face challenges in achieving tight threshold voltage distributions, especially in high-density non-volatile memory devices like TLC and QLC, which require more programming voltage pulses, affecting timing and efficiency.
Innovation Solution
The proposed solution involves a two-stage programming approach: coarse programming to quickly place charge levels close to desired levels and fine programming to precisely set these levels, allowing for simultaneous programming at all logical levels, thereby reducing coupling effects and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional programming techniques are used for high-density non-volatile memory devices, then manufacturing precision can be maintained, but programming time increases and productivity decreases due to requiring more programming voltage pulses
Solution Approach 1:
The patent divides the programming operation into two distinct stages: coarse programming and fine programming. Coarse programming quickly brings memory cells close to the target threshold voltage using larger voltage steps, while fine programming precisely adjusts the threshold voltage to achieve tight distributions. This segmentation allows the system to achieve both high speed and high precision without requiring excessive programming pulses.
2Manufacturing precision
If more programming voltage pulses are applied to achieve tight threshold voltage distributions, then manufacturing precision improves, but programming time increases affecting productivity
Solution Approach 1:
The coarse programming stage performs preliminary action by quickly positioning memory cell threshold voltages close to the desired target levels before fine programming begins. This preliminary positioning reduces the remaining adjustment needed, allowing fine programming to achieve tight threshold voltage distributions with fewer additional pulses, thereby reducing total programming time.
3Manufacturing precision
If sequential programming at different logical levels is performed, then programming precision can be maintained, but device complexity and programming time increase due to coupling effects
Solution Approach 1:
The patent merges the programming operations for multiple logical levels into a unified two-stage process. During coarse programming, multiple logical levels are programmed simultaneously using staged voltage boosts. During fine programming, all logical levels undergo precise adjustment in a coordinated manner. This merging eliminates sequential coupling effects and reduces overall programming complexity while maintaining precision.
Data Source
AI summary
An example memory device includes: a memory array; and a controller coupled to the memory array, the controller to perform the following operations: identifying a set of memory cells for performing a memory programming operation, such that the memory cells are electrically coupled to a target wordline and a set of target bitlines; causing a first voltage to be applied to the target wordline, such that the first voltage is incremented every time period over a sequence of time periods; causing a second voltage to be applied to a first bitline, such that the second voltage is incremented during a first time period of the sequence of time periods; and causing a third voltage to be applied to a second bitline, such that the third voltage is incremented during a second time period of the sequence of time periods.