AlN Ceramic Package for Low Thermal Resistance
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Solution Overview
Problem
Existing semiconductor packages face challenges in achieving both low thermal resistance and low electrical resistance, particularly for surface-mounted devices, which are crucial for high reliability and efficient performance.
Innovation Solution
A hermetically sealed AlN ceramic package with solid conductive vias and a Kovar ring, where a power semiconductor die is mounted with its electrodes connected to plated sections, providing ultra-low junction-to-case thermal resistance and extremely low electrical resistance through Au/Ni/Co metallizations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional semiconductor packages are used, then electrical resistance can be maintained at acceptable levels, but thermal resistance becomes too high for efficient heat dissipation
Solution Approach 1:
The patent employs AlN (aluminum nitride) ceramic material which combines excellent thermal conductivity with electrical insulation properties. This composite material approach allows the package substrate to efficiently conduct heat away from the semiconductor device while maintaining electrical isolation, thereby resolving the contradiction between thermal management requirements and electrical performance.
Solution Approach 2:
The patent introduces a specialized package structure with integrated thermal pathways that act as intermediaries between the heat-generating semiconductor device and the heat sink. The AlN ceramic substrate serves as a thermal mediator, providing dedicated heat conduction channels that do not interfere with electrical signal paths, thus improving heat dissipation without compromising electrical resistance characteristics.
2Volume of moving object
If package size is reduced for surface mounting, then mounting flexibility improves, but maintaining both low thermal and low electrical resistance becomes more difficult
Solution Approach 1:
The patent applies local quality by concentrating thermal management resources at critical locations within the compact package. The AlN ceramic substrate provides localized high thermal conductivity regions directly beneath heat-generating elements, while maintaining electrical insulation where needed. This spatial differentiation of material properties allows the small package to achieve both low thermal resistance at the die interface and acceptable electrical resistance overall.
Solution Approach 2:
The patent utilizes vertical dimensionality by implementing through-substrate vias and layered construction in the AlN ceramic package. Heat conduction pathways extend vertically through the package thickness, providing short thermal paths without increasing planar footprint. This three-dimensional thermal management architecture enables compact surface-mount packaging while maintaining effective heat dissipation and electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal resistance while maintaining low electrical resistance, enabling high reliability and efficient performance for surface-mounted semiconductor devices.
Implementation Method 1
The AlN material provides an ultra low junction to case thermal resistance
Implementation Method 2
the solid vias maintain an extremely low electrical resistance
Data Source
AI summary
A hermetically sealed AlN housing for power semiconductor die has a rectangular bottom surrounded by a peripheral wall. Spaced conductive plating sections on the top of the bottom section are connected by conductive vias to conductive plated sections on the bottom to enable surface mounting of the device. A ceramic lid is hermetically sealed over the top of the rectangular wall.