AlN/SiN Double-Layer Capping Layer for Moisture Barrier

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Solution Overview

Problem

As semiconductor devices shrink, the thinner SiCN capping layer fails to prevent moisture or water from penetrating into sub-layer low-k films due to its limited dielectric constant, leading to increased RC delay and reduced hermetic properties.

Innovation Solution

A method involving the deposition of a capping layer with a double-layer structure, comprising an aluminum nitride (AlN) layer and a silicon nitride (SiN) layer, formed using plasma-enhanced atomic layer deposition (PEALD) and pulsed plasma-enhanced chemical vapor deposition (P-PECVD) respectively, with a combined thickness of less than 100 Å, providing excellent hermetic properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the SiCN capping layer thickness is reduced to meet device scaling requirements, then device size is reduced, but hermetic properties deteriorate and moisture penetration increases

Engineering Contradiction:
Improvedevice sizeVSAvoidhermetic properties
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent replaces the single-layer SiCN capping layer with a composite structure consisting of an AlN layer and a SiN layer. The AlN layer provides superior moisture barrier properties due to its low water permeability, while the SiN layer offers complementary protective characteristics. This composite material approach maintains hermetic properties at reduced thicknesses, solving the contradiction between device scaling and moisture protection.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the material composition parameters of the capping layer by introducing AlN as a new material component with different physical and chemical properties (lower water permeability, different dielectric constant) compared to traditional SiCN. This parameter change enables the capping layer to maintain protective function at thinner dimensions, addressing both device scaling and hermeticity requirements.

Inventive Principle:
Principle #35Parameter changes

2Volume of moving object

If the SiCN capping layer thickness is reduced, then device size is reduced, but moisture penetration into low-k films increases

Engineering Contradiction:
Improvedevice sizeVSAvoidmoisture penetration
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The AlN/SiN composite capping layer structure provides enhanced moisture barrier properties through the synergistic combination of two different nitride materials. The AlN layer, with its inherently low water permeability, forms the primary barrier against moisture penetration, while the SiN layer provides additional protection. This composite structure effectively blocks moisture from reaching the porous low-k interlayer dielectric, solving the moisture penetration issue at reduced thicknesses.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The AlN layer acts as an intermediary barrier between the external environment (moisture source) and the vulnerable low-k dielectric layer. Its low water permeability property makes it an effective mediator that intercepts and blocks moisture diffusion paths, preventing moisture from reaching the low-k film even when the overall capping layer thickness is reduced for device scaling.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If a single-layer SiCN capping layer is used, then process simplicity is maintained, but protective function is insufficient at thin thicknesses

Engineering Contradiction:
Improveprocess simplicityVSAvoidprotective function
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the single-layer SiCN capping layer into two distinct functional layers: an AlN layer and a SiN layer. Each layer can be deposited using established semiconductor fabrication processes (such as ALD or PECVD), allowing the complex protective function to be achieved through sequential application of two well-understood deposition steps. This segmentation enables enhanced protection without introducing excessive process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The AlN/SiN double-layer capping structure provides multiple functions simultaneously: moisture barrier protection, etch stop functionality, and stress management. The AlN layer contributes low water permeability and etch selectivity, while the SiN layer adds mechanical stability and additional barrier properties. This multi-functional design achieves superior protective performance using standard semiconductor processing techniques.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The AlN/SiN double-layer capping layer effectively prevents moisture penetration, maintains low dielectric constant, and minimizes stress changes, ensuring reliable semiconductor device performance even at reduced thicknesses.

Implementation Method 1

depositing an aluminum nitride (AlN) layer by using a plasma-enhanced atomic layer deposition (PEALD) method

Methodology Applied
Scientific EffectPlasma-enhanced atomic layer deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 2

depositing a silicon nitride (SiN) layer by using a pulsed plasma-enhanced chemical vapor deposition (P-PECVD) method

Methodology Applied
Scientific EffectPulsed plasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS10249577B2Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
Publication Date: 2019.04.02 ASM IP HLDG BV
  • US10249577B2 patent drawing
  • US10249577B2 patent drawing
  • US10249577B2 patent drawing

AI summary

A semiconductor manufacturing method includes depositing a low-k dielectric layer, forming a trench in the low-k dielectric layer, forming a barrier layer in the trench, filling a metal on the barrier layer, planarizing the metal, and forming a capping layer on the planarized metal, wherein the capping layer includes at least two layers.