AlON Nucleation Layer for Nitride Semiconductor Epitaxy

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Solution Overview

Problem

Current methods for depositing group III nitride materials on non-native substrates face challenges in controlling temperature, layer thickness, and substrate interactions during the heteroepitaxy process, leading to undesired variations and the need for time-consuming temperature adjustments.

Innovation Solution

A nucleation layer comprising aluminum oxynitride (AlON) with a column structure is applied directly on a substrate at higher temperatures, using MOVPE or sputtering, to facilitate the growth of nitride compound semiconductor layers with improved crystal quality and reduced temperature ramps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If a nucleation layer is deposited by MOVPE at low temperature (450-690°C) on non-native substrates, then the deposition process can be initiated, but temperature control becomes difficult and time-consuming temperature ramps are required between thermal cleaning and nucleation layer deposition

Engineering Contradiction:
Improvedeposition temperatureVSAvoidtemperature adjustment time
Core Design Contradiction:
TemperatureVSLoss of time

Solution Approach 1:

The patent changes the material composition of the nucleation layer from pure group III nitride to a mixed layer containing group III oxide and group III nitride. This compositional change enables deposition at higher temperatures (700-900°C), eliminating the need for time-consuming temperature ramps between thermal cleaning and nucleation layer deposition, as the same high temperature range can be used for both processes

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If the nucleation layer is deposited at low temperature, then the process can proceed without extensive temperature ramps, but the material quality and crystal structure of subsequent semiconductor layers are compromised

Engineering Contradiction:
Improvelayer thickness controlVSAvoidcrystal quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent changes the deposition temperature parameter from low (450-690°C) to high (700-900°C) by modifying the nucleation layer composition. This temperature increase improves the crystal quality and material reliability of subsequently grown semiconductor layers while maintaining precise control over layer thickness through the mixed composition approach

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite nucleation layer consisting of group III oxide and group III nitride materials. This composite structure provides the benefits of both components: the oxide enables high-temperature deposition for improved crystal quality, while the nitride component maintains compatibility with subsequent semiconductor layer growth

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If thermal cleaning is performed at high temperature before nucleation layer deposition, then substrate surface quality is improved, but subsequent temperature adjustments to deposition temperature are time-consuming

Engineering Contradiction:
Improvesurface qualityVSAvoidprocess efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the nucleation layer deposition temperature to match the thermal cleaning temperature range (700-900°C). This eliminates the need for temperature ramps between these two process steps, maintaining high surface quality through thermal cleaning while improving process efficiency by removing time-consuming temperature adjustments

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If the nucleation layer composition is optimized for low-temperature deposition, then the initial deposition can proceed, but the process window for layer thickness and temperature control is limited

Engineering Contradiction:
Improvedeposition feasibilityVSAvoidprocess window
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent employs a composite nucleation layer of group III oxide and group III nitride that broadens the process window. The mixed composition allows deposition across a wider temperature range (700-900°C) and provides greater flexibility in controlling layer thickness, while maintaining ease of manufacture through standard MOVPE or sputtering techniques

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the material quality of subsequently grown semiconductor layers by maintaining a stable temperature range and reducing crystal defects, improving the process window for layer thickness and temperature, resulting in higher-quality epitaxy substrates for optoelectronic semiconductor chips.

Implementation Method 1

Conventionally, both the nucleation layer and the subsequent layer structure are deposited by means of metalorganic vapor phase epitaxy (MOVPE)

Methodology Applied
Scientific EffectMetalorganic vapor phase epitaxy (MOVPE): Chemical Vapour Deposition

Implementation Method 2

the deposition of a nucleation layer consisting of AlN by means of sputtering is also known from U.S. Pat. No. 6,692,568 B2

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 3

The nucleation layer in turn provides a surface on which the semiconductor layer sequence of the nitride compound semiconductor material can be grown by an epitaxy method, for example MOVPE or MBE (molecular beam epitaxy)

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9484490B2Epitaxy substrate, method for producing an epitaxy substrate and optoelectronic semiconductor chip comprising an epitaxy substrate
Publication Date: 2016.11.01 OSRAM OLED
  • US9484490B2 patent drawing
  • US9484490B2 patent drawing
  • US9484490B2 patent drawing

AI summary

An epitaxy substrate (11, 12, 13) for a nitride compound semiconductor material is specified, which has a nucleation layer (2) directly on a substrate (1) wherein the nucleation layer (2) has at least one first layer (21) composed of AlON with a column structure. A method for producing an epitaxy substrate and an optoelectronic semiconductor chip comprising an epitaxy substrate are furthermore specified.