AlphaRA Memory Repair via Reinforcement Learning
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Solution Overview
Problem
Current Redundancy Analysis (RA) algorithms for repairing faulty memory cells in DRAM devices face challenges with increasing memory densities, as they either have low repair rates with fast runtime or achieve optimal repair rates but with exponential time complexities, making them impractical for manufacturing lines with high error counts.
Innovation Solution
The AlphaRA method uses a Reinforcement Learning approach based on AlphaZero, combining Monte Carlo Tree Search and Deep Neural Networks to efficiently allocate spare rows and columns for repairing faulty memory cells, allowing the system to self-discover strategies and optimize repair rates without prior domain knowledge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If exhaustive RA algorithms (FLCA, Branch-and-Bound, PAGEB) are used to achieve optimal repair rates, then the repair rate is maximized, but the time complexity grows exponentially making them infeasible for manufacturing lines
Solution Approach 1:
The patent transforms the RA problem parameters by representing the memory chip as a matrix and using neural network parameters to learn optimal repair strategies. The AlphaZero algorithm changes the search parameters from exhaustive enumeration to guided exploration with configurable simulation counts, balancing optimality and computational feasibility.
Solution Approach 2:
The patent replaces traditional mechanical/combinatorial search algorithms with a neural network-based system. The AlphaZero agent uses deep learning models to substitute the exhaustive search mechanism, achieving near-optimal repair rates without exponential time complexity by learning patterns from self-play simulations.
2Productivity
If heuristic RA algorithms (Broadside, Repair-Most, LECA, OSP, FAST) are used to reduce runtime, then the execution time is reduced, but the repair rates become low
Solution Approach 1:
The AlphaZero agent performs self-play simulations to learn repair strategies autonomously without requiring pre-programmed heuristics or domain knowledge. The system serves itself by generating training data through self-play and using that data to improve its own repair capabilities, achieving both speed and optimality.
Solution Approach 2:
The patent implements feedback mechanisms where the neural network evaluates repair outcomes and uses this feedback to update its policy and value networks. The AlphaZero algorithm continuously refines its strategy based on feedback from self-play simulations, allowing it to overcome the limitations of static heuristic algorithms.
3Quantity of substance
If memory density is increased to meet demand, then the capacity is improved, but the probability of defects increases and wafer yield decreases
Solution Approach 1:
The patent applies preliminary action by performing redundancy analysis and allocating spare rows/columns to defective cells before the memory device is finalized. The AlphaZero algorithm predicts and plans repair strategies in advance, identifying optimal spare allocations that maximize yield before manufacturing commitments are made.
Solution Approach 2:
The patent changes the approach to handling defects by transforming the RA problem into a learnable pattern recognition task. Instead of treating each defect case individually with complex algorithms, the neural network learns generalizable patterns from training data, enabling efficient handling of high-density memory with numerous defects.
Data Source
AI summary
A method for repairing a memory device with faulty memory cells. The method includes defining a RA environment comprising a location of each of the faulty memory cells and a plurality of SR and a plurality of SC. The method further includes repairing the faulty memory cells based on an RA training process using the defined RA environment and mapping of the location of each faulty memory cell with the plurality of SC or SR. The method further includes training, based on a determination that indicates the at least one faulty memory cell among the faulty memory cells is left unrepaired and the at least one SC or SR is remaining, a first NN to perform an action for repairing of the faulty memory cells such that a maximum number of faulty memory cells are reparable and a minimum number of SC and SR are utilized during the repairing.