AlSiO Gate Insulator for Nitride Semiconductor Threshold Control

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Solution Overview

Problem

Current semiconductor devices using nitride semiconductors face challenges in improving their characteristics, particularly in achieving high threshold voltages and stable switching performance.

Innovation Solution

The semiconductor device incorporates a specific structure with AlxGa1−xN semiconductor regions and AlSiO compound members, featuring inverse tapered gate insulating film shapes and varying Si composition ratios, which control current flow and enhance threshold voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional nitride semiconductor structures are used, then device simplicity is maintained, but threshold voltage control and switching performance are insufficient

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate insulating film is segmented into multiple layers: a first gate insulating film (AlSiO3) and a second gate insulating film (Al2O3). This segmentation allows each layer to contribute differently to the overall device performance, with the first layer providing threshold voltage control through Si diffusion and the second layer providing stable insulation, thereby resolving the contradiction between reliability improvement and structural simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating an inverse tapered shape in the gate insulating film structure, where the film thickness varies across the device width. This local variation in film thickness creates different electric field distributions and carrier concentrations in different regions, enabling precise control of threshold voltage and switching characteristics without requiring complex overall device restructuring.

Inventive Principle:
Principle #3Local quality

2Reliability

If interface state density is high, then manufacturing is easier, but switching performance and device stability deteriorate

Engineering Contradiction:
Improveswitching performance stabilityVSAvoidinterface quality control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The gate insulating film uses a composite structure of AlSiO3 and Al2O3 layers. The AlSiO3 layer provides Si atoms that diffuse into the semiconductor to control threshold voltage, while the Al2O3 layer provides excellent insulation properties and low interface state density. This composite material approach achieves both easy manufacturing (through standard deposition processes) and high switching performance stability (through low interface states).

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The gate insulating film structure acts as an intermediary between the gate electrode and the semiconductor layer. By carefully designing this intermediate structure with specific materials and profiles, it mediates the interaction between the gate and semiconductor, controlling carrier concentration and electric field distribution to achieve stable switching performance while maintaining manufacturability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If threshold voltage is increased, then switching performance improves, but current flow control becomes more difficult

Engineering Contradiction:
Improveswitching performanceVSAvoidcurrent flow control
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The gate insulating film structure is designed to be dynamic in its electrical characteristics. The inverse tapered profile and multi-layer composition allow the electric field and carrier concentration to be dynamically adjusted based on gate voltage applied. This enables the device to achieve high threshold voltage for stable switching while maintaining good current flow control through appropriate gate voltage modulation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent utilizes parameter changes in the gate insulating film structure, specifically varying the Si composition ratio and film thickness across the device (inverse tapered shape). These parameter variations create a gradient in electrical properties that enables simultaneous achievement of high threshold voltage and good current control characteristics.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration results in improved semiconductor device characteristics, including higher threshold voltages and reduced interface state densities, leading to enhanced switching performance and stability.

Implementation Method 1

the first compound member includes aluminum, silicon, and oxygen

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

featuring inverse tapered gate insulating film shapes and varying Si composition ratios, which control current flow and enhance threshold voltages

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS11563114B2Semiconductor device and method of manufacturing the same
Publication Date: 2023.01.24 KK TOSHIBA
  • US11563114B2 patent drawing
  • US11563114B2 patent drawing
  • US11563114B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes first, second, third electrodes, a semiconductor member, and a first compound member. The third electrode is between the first and second electrodes in a first direction from the first to second electrodes. The semiconductor member includes first and second semiconductor regions. The first semiconductor region includes first, second, third, fourth, and fifth partial regions. A second direction from the first partial region to the first electrode crosses the first direction. The fourth partial region is between the first and third partial regions in the first direction. The fifth partial region is between the third and second partial regions in the first direction. The second semiconductor region includes first and second semiconductor portions. The first compound member includes first, second and third compound regions.