Alternating Chip Stack Layout for Compact Semiconductor Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor packages face challenges in reducing the size due to the lateral shifting of semiconductor chips to expose pads for connection, leading to increased arrangement areas and difficulties in forming columnar electrodes at a narrow pitch.
Innovation Solution
A semiconductor device design where semiconductor chips are stacked in alternating face-down and face-up configurations, with columnar electrodes and wires connecting pads in a staggered manner, minimizing overlapping areas and allowing for shorter columnar electrodes, thereby reducing the package size and facilitating narrower pitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If semiconductor chips are laterally shifted to expose pads for connection, then pads can be connected to wires, but the arrangement area increases
Solution Approach 1:
The patent transitions from a conventional planar arrangement where chips are laterally shifted to a three-dimensional stacked configuration. By stacking chips vertically with alternating face-down and face-up orientations, the pad connection function is achieved in the vertical dimension rather than through lateral shifting, thereby reducing the horizontal arrangement area while maintaining manufacturability.
2Area of stationary object
If semiconductor chips are stacked vertically, then package size can be reduced, but columnar electrodes must be formed at narrow pitch
Solution Approach 1:
The patent divides the stack into multiple groups, where each group consists of alternating face-down and face-up chips. Within each group, columnar electrodes connect pads at standardized intervals. This segmentation allows the use of wider pitch electrodes within groups while achieving overall compact packaging through the stacked configuration, thereby reducing manufacturing precision requirements for narrow pitch electrode formation.
3Reliability
If columnar electrodes are formed to connect stacked chips, then electrical connection is achieved, but electrode length increases
Solution Approach 1:
By alternating face-down and face-up chip orientations in the stack, the patent enables columnar electrodes to connect pads across shorter vertical distances. The alternating configuration allows electrodes to traverse through adhesive layers and chip thicknesses in a more efficient manner, reducing overall electrode length while maintaining reliable electrical connections between stacked chips.
Data Source
AI summary
A semiconductor device includes a first stacked body provided above a substrate, and including a plurality of first semiconductor chips stacked on top of one another; and a second stacked body provided further above the first stacked body, and including a plurality of second semiconductor chips stacked on top of one another. The first semiconductor chips each have a first pad facing toward the substrate, and the second semiconductor chips each have a second pad facing away from the substrate.