Alternating Data Selection Circuit for Memory Transmission
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Solution Overview
Problem
Conventional memory devices face inefficiencies in programming and reading data due to overlapping voltage times between neighboring controllable channels, leading to disturbances and the need for a duty-gap period, which increases the time required for these operations.
Innovation Solution
A circuit and method utilizing two data selection circuits with controllable channels that alternate their operating channels between odd and even-numbered periods to transmit data, ensuring that each bit datum is transmitted through a dedicated channel without overlap, thereby reducing disturbance and shortening the programming or reading time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single data selection circuit transmits data through controllable channels, then the circuit structure is simple, but overlapping voltage times between neighboring channels cause disturbances and require duty-gap periods, increasing transmission time
Solution Approach 1:
The patent divides the data selection circuit into two separate data selection circuits (first and second), each handling different time periods. The first data selection circuit transmits data during odd-numbered periods while the second handles even-numbered periods, segmenting the transmission function to eliminate channel interference and duty-gap requirements.
Solution Approach 2:
The patent implements periodic action by alternating between odd-numbered periods and even-numbered periods for data transmission. Each period uses a specific data selection circuit, creating a rhythmic transmission pattern that prevents overlapping voltages and eliminates the need for duty-gap periods between transmissions.
2Speed
If neighboring controllable channels operate simultaneously, then transmission speed is high, but voltage overlap causes disturbances to adjacent channels
Solution Approach 1:
The patent uses periodic action by dividing transmission into odd-numbered periods and even-numbered periods. During odd periods, the first data selection circuit operates; during even periods, the second data selection circuit operates. This periodic alternation ensures that neighboring channels never operate simultaneously, eliminating voltage overlap and channel disturbances while maintaining high transmission speed.
3Reliability
If duty-gap periods are inserted between transmissions to prevent disturbance, then channel interference is reduced, but the overall programming or reading time increases
Solution Approach 1:
The patent segments the transmission function into two parallel data selection circuits that operate in alternating periods. This segmentation eliminates the need for duty-gap periods because each circuit operates independently during its designated period, preventing interference without requiring idle time between transmissions, thus reducing total programming or reading time while maintaining reliability.
Solution Approach 2:
The patent achieves continuity of useful action by ensuring that data transmission continues without interruption through the alternation of odd and even periods. While one data selection circuit is active, the other is prepared, eliminating idle duty-gap periods and maintaining continuous productive operation, thereby reducing total transmission time while preventing channel interference.
Data Source
AI summary
A circuit including a first data selection circuit and a second data selection circuit for transmitting a data stream is provided. The first data selection circuit having first controllable channels turns on a first operating channel being one of the first controllable channels in an odd-numbered period and turns off the first controllable channels in an even-numbered period adjacent to the odd-numbered period for transmitting a first bit datum of the data stream. The second data selection circuit having second controllable channels turns off the second controllable channels in the odd-numbered period and turns on a second operating channel being one of the second controllable channels in the even-numbered period for transmitting a second bit datum of the data stream.