Alternating Fan-Out Lines for Uniform Signal Transmission
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Solution Overview
Problem
In narrow-bezel display devices, the overlap of gate fan-out lines and data fan-out lines causes parasitic capacitance and RC delay deviation, leading to non-uniform driving of display devices due to varying overlap areas and resistance differences.
Innovation Solution
The display panel design includes alternately disposed gate fan-out lines and data fan-out lines on the same layer, with equal resistance and length, and a driver integrated circuit that applies scan and data signals, ensuring no overlap between these lines and using second gate lines insulated by an interlayer to minimize RC delay deviation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If gate fan-out lines and data fan-out lines are insulated by an insulating layer, then the lines can be disposed on one side of the display panel, but parasitic capacitance occurs in the overlap area causing RC delay deviation
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement where gate and data fan-out lines overlap to a three-dimensional stacked arrangement. Gate fan-out lines are disposed on a first substrate while data fan-out lines are disposed on a second substrate positioned at a different height, eliminating overlap in the vertical dimension and thus removing parasitic capacitance between the lines
Solution Approach 2:
The patent divides the fan-out lines into separate gate fan-out lines and data fan-out lines that are physically separated onto different substrates. This segmentation prevents the lines from overlapping and interacting electrically, eliminating the parasitic capacitance problem while maintaining the narrow bezel design
2Reliability
If gate fan-out lines and data fan-out lines are disposed alternately, then RC delay deviation is removed, but the device complexity increases
Solution Approach 1:
The patent merges the gate driver IC and data driver IC into a single integrated driver IC that contains both gate driving circuits and data driving circuits. This consolidation simplifies the overall device structure despite the alternating arrangement of fan-out lines, as the driver functions are unified in one component rather than requiring separate driver ICs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively removes RC delay deviation, allowing for uniform signal transmission and improved display device performance by maintaining consistent resistance and length across fan-out lines, enhancing the uniformity of scan and data signal application.
Implementation Method 1
a gate fan-out line and a data fan-out line that are insulated by an insulating layer
Implementation Method 2
one of the first gate lines and a corresponding one of the second gate lines may be coupled through a contact hole in an overlap area
Data Source
AI summary
A display device includes: a substrate partitioned into a display area including a plurality of pixels for displaying images thereon and a non-display area around the display area; a plurality of first gate lines and a plurality of data lines extended in one direction on the display area; a plurality of pads on one side of the non-display area; a plurality of gate fan-out lines, each coupling one of the first gate lines and a corresponding one of the pads; and a plurality of data fan-out lines, each coupling one of the data lines and a corresponding one of the pads, wherein the gate fan-out lines and the data fan-out lines may be alternately disposed.