Alternating Read Polarity for Polarity-Written Memory Cells
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Polarity-written memory cells experience voltage drift and read disturb due to repeated application of read pulses with the same polarity, leading to decreased read window size and unintended logic value changes, which affect the performance and efficiency of memory devices.
Innovation Solution
Varying the polarity of read voltages using positive and negative polarities randomly or according to a pattern to avoid soft-programming and mitigate the effects of voltage drift and read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If read pulses with the same polarity are repeatedly applied to polarity-written memory cells, then read operations can be performed, but voltage drift and read disturb occur leading to decreased read window size and unintended logic value changes
Solution Approach 1:
The patent applies periodic action by alternating the polarity of read pulses (e.g., positive-negative-positive) in a systematic sequence. This periodic variation prevents the memory cell from experiencing repeated same-polarity reads that cause voltage drift and read disturb, thereby maintaining data accuracy while enabling continuous read operations
Solution Approach 2:
The patent changes the parameter of read pulse polarity from a constant value to a varying value. By modifying the polarity parameter of subsequent read pulses based on the polarity of the previous read pulse (e.g., using opposite polarity for consecutive reads), the system mitigates voltage drift and read disturb effects, resolving the contradiction between maintaining read operation capability and ensuring data accuracy
2Ease of operation
If read pulses with the same polarity are repeatedly applied, then read operations are simplified, but soft-programming occurs causing unintended logic value changes
Solution Approach 1:
The patent implements periodic action by systematically alternating read pulse polarities in a sequence. This prevents soft-programming by ensuring that consecutive read pulses do not have the same polarity, thereby avoiding unintended logic value changes while maintaining operational simplicity through an automated polarity switching mechanism
Solution Approach 2:
The patent applies inversion by using the opposite polarity for consecutive read pulses. Instead of repeating the same polarity, the system inverts the polarity of each subsequent read pulse relative to the previous one, which prevents soft-programming and maintains logic value stability without complicating the read operation
Data Source
AI summary
Methods, systems, and devices for varying-polarity read operations for polarity-written memory cells are described. Memory cells may be programmed to store different logic values based on applying write voltages of different polarities to the memory cells. A memory device may read the logic values based on applying read voltages to the memory cells, and the polarity of the read voltages may vary such that at least some read voltages have one polarity and at least some read voltages have another polarity. The read voltage polarity may vary randomly or according to a pattern and may be controlled by the memory device or by a host device for the memory device.