Alternating RESURF Layers for SiC Breakdown Voltage

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Solution Overview

Problem

The existing RESURF structure for semiconductor devices has limitations in increasing breakdown voltage due to electric field concentration at the peripheral edge, and current methods for reducing this concentration, such as gradual implantation, increase the number of photolithography and impurity implantation processes, making them costly and inefficient, especially for materials like SiC with small thermal diffusion length.

Innovation Solution

A semiconductor device with a RESURF layer configuration that includes alternating first and second electric field relaxation layers with varying implantation densities, reducing the number of photolithography and impurity implantation processes, and allowing for high breakdown voltage resistance by gradually decreasing implantation amounts towards the outside.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a normal RESURF structure with uniform implantation is used, then the manufacturing process is simple, but electric field concentration occurs at the peripheral edge limiting breakdown voltage increase

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidbreakdown voltage resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The RESURF layer is segmented into multiple regions with different implantation densities. The patent divides the originally uniform RESURF layer into a first region (near the active region) with higher implantation density and a second region (peripheral edge) with lower implantation density. This segmentation allows the electric field to be distributed more evenly across the peripheral edge, reducing field concentration and enabling higher breakdown voltage while maintaining manufacturing feasibility through controlled implantation processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the RESURF layer are given different local properties through varying implantation densities. The first region near the active region maintains higher implantation density for optimal electric field relaxation, while the second region at the peripheral edge uses lower implantation density to reduce field concentration at the outermost edge. This local quality variation optimizes both breakdown voltage resistance and manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

2Reliability

If gradual implantation reduction toward the outside is implemented to reduce electric field concentration, then breakdown voltage resistance improves, but the number of photolithography and impurity implantation processes increases

Engineering Contradiction:
Improvebreakdown voltage resistanceVSAvoidnumber of manufacturing processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the gradual implantation reduction concept from complex multi-step processes and implements it through a simplified two-region structure. Instead of requiring multiple sequential implantation processes with different masks to achieve gradual reduction, the invention divides the RESURF layer into just two regions with distinct implantation densities, achieving the same electric field distribution benefit with fewer manufacturing steps.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the implantation density parameter across different regions of the RESURF layer. By varying the implantation density from high in the first region to low in the second region, the invention achieves gradual implantation reduction effect that distributes electric field concentration, thereby improving breakdown voltage resistance without requiring an excessive number of manufacturing processes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If multiple implantation processes are used to reduce electric field concentration, then breakdown voltage increases, but manufacturing cost and time increase

Engineering Contradiction:
Improvebreakdown voltageVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges the function of multiple implantation processes into a simplified two-region implantation scheme. By combining the electric field relaxation function and the field concentration reduction function into a single integrated RESURF layer structure with two regions, the invention achieves high breakdown voltage without requiring multiple separate implantation processes, thereby improving manufacturing efficiency and reducing production time.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the number of manufacturing processes, lowers costs, and achieves high breakdown voltage resistance while avoiding electric field concentration issues, making it suitable for materials like SiC.

Implementation Method 1

an electric field is concentrated also on the peripheral edge of the RESURF layer

Methodology Applied
Scientific EffectElectric field concentration: Electric Field

Implementation Method 2

a depletion layer extends inside the semiconductor substrate while the diode is turned off. This depletion layer can maintain high voltage

Methodology Applied
Scientific EffectDepletion layer extension:

Implementation Method 3

The application of a voltage exceeding the breakdown voltage leads to an avalanche breakdown in the portion inside the semiconductor substrate, in which an electric field is concentrated

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Implementation Method 4

Impurities of a second conductivity type are implanted to the first electric field relaxation layers at a first surface density, widths of the first electric field relaxation layers becoming smaller as apart from the active region

Methodology Applied
Scientific EffectImpurity implantation: Ion Implantation

Data Source

PatentUS9536942B2Semiconductor device having a plurality of electric field relaxation layers and method for manufacturing same
Publication Date: 2017.01.03 MITSUBISHI ELECTRIC CORP
  • US9536942B2 patent drawing
  • US9536942B2 patent drawing
  • US9536942B2 patent drawing

AI summary

A semiconductor device includes an active region formed in an upper layer portion of a semiconductor layer of a first conductivity type, and a plurality of electric field relaxation layers disposed from an edge of the active region toward the outside so as to surround the active region. The plurality of electric field relaxation layers include a plurality of first electric field relaxation layers and a plurality of second electric field relaxation layers alternately disposed adjacent to each other, the first electric field relaxation layer and the second electric field relaxation layer adjacent to each other forming a set. Impurities of a second conductivity type are implanted to the first electric field relaxation layers at a first surface density, widths of which becoming smaller as apart from the active region. Impurities of the second conductivity type are implanted to the second electric field relaxation layers at a second surface density lower than the first surface density, widths of which becoming larger as apart from the active region.