Alternating TFT Sub-Pixel Layout for Higher VR Display Resolution

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Solution Overview

Problem

Existing VR display devices are limited by hardware and software, preventing improvements in resolution.

Innovation Solution

A display device with alternately arranged data and scan lines, connected thin film transistors, and symmetrical sub-pixel groups, along with a unique driving module configuration, to enhance resolution without increasing pixel driving circuit load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional VR display device structures are used, then hardware and software limitations are maintained, but resolution improvement is prevented

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel driving circuit load
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The pixel array is segmented into first and second pixel arrays arranged in alternating columns. Each pixel array is independently driven by separate data lines (first data lines and second data lines), dividing the driving circuit load into two independent parts. This segmentation allows resolution improvement without overloading the driving circuits, as each circuit only needs to handle half the total pixel count.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If more data lines are added to improve resolution, then pixel density increases, but driving circuit load increases

Engineering Contradiction:
Improvedisplay resolutionVSAvoiddriving circuit load
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Adjacent first data lines are electrically connected and adjacent second data lines are electrically connected, merging multiple data lines into fewer independent driving circuits. This merging reduces the number of independent driving circuits needed while maintaining the ability to drive all pixels, thereby improving resolution without proportionally increasing driving circuit load.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If sub-pixels are arranged in alternating patterns, then resolution is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedisplay resolutionVSAvoidsub-pixel arrangement precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The first and second pixel arrays are arranged in an asymmetric alternating pattern where first sub-pixels and second sub-pixels occupy different column positions. This asymmetric arrangement, combined with the mirror-symmetrical channel extension directions, creates a regular repeating unit that simplifies manufacturing alignment requirements compared to more complex symmetric patterns.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different regions of the display are assigned different sub-pixel types (first or second) based on their column position. Each region has uniform local characteristics, which simplifies the manufacturing process within each local area while achieving high overall resolution through the alternating pattern.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4715795A1Display apparatus
Publication Date: 2026.03.25 WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
  • EP4715795A1 patent drawingFigure 1~2
  • EP4715795A1 patent drawingFigure 3~4
  • EP4715795A1 patent drawingFigure 5~6

AI summary

The present application discloses a display device. The display device includes a first scan line, a second scan line, a first data line, a second data line, a first sub-pixel, and a second sub-pixel. The first sub-pixel includes a first thin film transistor, and the second sub-pixel includes a second thin film transistor. The first thin film transistor is connected to the first scan line and the first data line. The second thin film transistor is connected to the second scan line and the second data line. The first thin film transistor and the second thin film transistor are alternatively arranged.