Alternating Thick and Thin RDL Stacked Packages
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Solution Overview
Problem
As semiconductor packages grow larger to accommodate more functions, particularly in AI applications, long redistribution lines (RDLs) experience high resistance values, leading to significant insertion loss, especially for high-speed signals.
Innovation Solution
The formation of packages with alternating thick and thin dielectric layers and RDLs, where thick dielectric layers are used with thicker RDLs for horizontal routing and thin dielectric layers with thinner RDLs for electromagnetic shielding, reducing insertion loss while maintaining impedance balance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If packages are made larger to accommodate more functions, then the routing ability and functionality are improved, but the redistribution lines become longer causing higher resistance values and significant insertion loss
Solution Approach 1:
The patent divides the redistribution lines into multiple segments by stacking multiple RDL layers vertically. Instead of having a single long horizontal routing path, the routing function is segmented across multiple shorter segments in different layers, reducing the effective length of each individual RDL and thereby reducing insertion loss while maintaining overall routing capability.
Solution Approach 2:
The patent transitions from two-dimensional planar routing to three-dimensional stacked routing by adding vertical dimension with multiple RDL layers. This allows routing paths to be distributed across multiple z-heights, effectively shortening the horizontal trace length of individual RDLs and reducing their resistance and insertion loss while maintaining the same package footprint.
2Loss of energy
If thicker RDLs are used to reduce resistance, then the insertion loss is reduced, but the package warpage increases
Solution Approach 1:
The patent applies different RDL thicknesses to different functional layers: thicker RDLs are used in specific layers where high current carrying capacity is needed to reduce insertion loss, while thinner RDLs are used in other layers where electromagnetic shielding is the primary function. This local differentiation allows optimization of each layer's specific function while balancing overall package warpage.
Solution Approach 2:
The patent creates a composite interconnect structure by alternating thick and thin RDL layers with corresponding dielectric layers. This composite structure combines the low-resistance benefit of thick RDLs with the warpage-control benefit of thin RDLs, achieving a balanced performance that neither uniform thick nor uniform thin structure could provide alone.
3Loss of energy
If multiple RDL layers are stacked to reduce insertion loss, then the routing ability is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple functions into the RDL structure itself: thick RDLs provide both low-resistance power/signal routing and structural support, while thin RDLs provide electromagnetic shielding and partial routing function. This functional merging reduces the need for separate dedicated shielding layers or support structures, thereby limiting the increase in overall device complexity despite adding multiple RDL layers.
Data Source
AI summary
A method includes forming a plurality of dielectric layers, which processes include forming a first plurality of dielectric layers having first thicknesses, and forming a second plurality of dielectric layers having second thicknesses smaller than the first thicknesses. The first plurality of dielectric layers and the second plurality of dielectric layers are laid out alternatingly. The method further includes forming a plurality of redistribution lines connected to form a conductive path, which processes include forming a first plurality of redistribution lines, each being in one of the first plurality of dielectric layers, and forming a second plurality of redistribution lines, each being in one of the second plurality of dielectric layers.


