Alternating TSV Strings for Power Noise Reduction
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Solution Overview
Problem
In semiconductor devices with stacked chips, the noise generated by through-substrate vias (TSVs) due to load variations is significant, and existing solutions like increasing capacitance are not feasible due to size and cost constraints, especially in devices like DRAMs where size reduction is essential.
Innovation Solution
The semiconductor device employs a configuration where first and second TSVs for different power supplies are arrayed adjacent to each other to form TSV strings, reducing inductance and noise by minimizing the proximity of TSVs supplying the same power type, and using a multi-layer interconnect structure to equalize current values across TSVs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the capacitance value of smoothing capacitor element is increased to reduce power supply noise, then the noise is reduced, but the chip size increases
Solution Approach 1:
The patent arranges TSVs for different power supplies (VDD and VSS) alternately in via strings, converting the harmful inductive effects into beneficial mutual inductance cancellation. The alternating arrangement causes magnetic fields from adjacent TSVs to oppose each other, reducing overall inductance and noise without requiring additional capacitor space.
Solution Approach 2:
The patent changes the spatial arrangement parameter of TSVs from conventional grouping to alternating patterns. By adjusting the pitch and spacing parameters between adjacent TSVs in via strings, the inductance is optimized to minimize noise while maintaining compact chip dimensions.
2Object-affected harmful factors
If the distance between TSVs is reduced to minimize inductor effects, then inductance is reduced, but the currents from multiple interconnects concentrate causing AC noise
Solution Approach 1:
The patent segments the power supply network into multiple via strings, each containing alternating TSVs for different power supplies. This segmentation distributes the current paths and prevents concentration of currents from multiple interconnects, reducing AC noise while maintaining small TSV spacing for low inductance.
Solution Approach 2:
The patent introduces intermediate structures including via strings that alternate between VDD and VSS TSVs, and power supply meshes formed by interconnects. These intermediaries mediate the current distribution, preventing direct current concentration while maintaining electrical integrity.
3Ease of manufacture
If TSVs for the same power supply are placed adjacent to each other, then routing is simplified, but inductance increases causing more noise
Solution Approach 1:
The patent inverts the conventional routing approach by alternating TSVs for different power supplies rather than grouping them. This inversion creates via strings where VDD and VSS TSVs alternate, simplifying the alternating connection pattern to power supply meshes while reducing inductance through mutual field cancellation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the noise associated with TSV inductors, allowing for efficient power supply without increasing chip size or cost, particularly beneficial in applications with high current changes like logic LSIs and DRAMs.
Implementation Method 1
a plurality of first through-substrate vias (101) used to supply power of a first power supply and penetrating through a substrate structure of a semiconductor device, and another plurality of second through-substrate vias (102) used to supply power of a second power supply different from the first power supply and penetrating through the substrate structure
Implementation Method 2
The first and second through-substrate vias are arrayed adjacent to one another, extending in a first direction to form a through-substrate via string(s)
Data Source
AI summary
There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply different from the first power supply and that penetrate through a substrate structure. The semiconductor device also includes a through-substrate via string composed by the first and second through-substrate vias, in which the first through-substrate vias are located adjacent to one another and the second through-substrate vias are also located adjacent to one another. The through-substrate via string is disposed in the substrate structure for extending in a first direction.