ALU Bitwise Execution of Conditional Statements Without Comparators

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Solution Overview

Problem

Digital comparators in computing systems require at least 2 clock cycles per operation, causing bottlenecks and limiting parallel execution of multilevel conditional tasks, which affects processing speed and efficiency.

Innovation Solution

Transform conditional statements into arithmetic and/or bitwise operations, enabling execution solely by an arithmetic and/or bitwise unit of the processor without using a digital comparator, allowing parallel execution of multiple fragments by multiple arithmetic and/or bitwise blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a digital comparator is used to evaluate Boolean conditions, then the conditional statements can be executed, but the processing speed is limited to at least 2 clock cycles per operation and parallel execution is unable

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent replaces the digital comparator (a dedicated comparison device) with arithmetic and bitwise operations performed by existing ALU components. This substitution eliminates the need for separate comparison hardware and allows conditional logic to be executed using standard arithmetic units, thereby improving speed and enabling parallel execution.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent makes the arithmetic and bitwise units perform multiple functions: they not only execute arithmetic calculations but also evaluate Boolean conditions and generate control signals for conditional execution. This multi-functionality eliminates the need for dedicated comparator hardware and enables parallel processing of multiple conditional tasks.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If a digital comparator is used for conditional statement execution, then comparison operations can be performed, but the execution time increases and bottlenecks are created in the processor

Engineering Contradiction:
Improveexecution speedVSAvoidclock cycles
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent substitutes the digital comparator with arithmetic operations in the ALU, allowing condition evaluation to occur in the same execution pipeline as arithmetic operations. This eliminates the 2-clock-cycle penalty and allows conditional logic to be resolved in a single clock cycle alongside other computations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent merges the comparison function with the arithmetic and bitwise operations in the ALU. By combining these functions into a single unified execution unit, the patent eliminates separate comparison stages and reduces the total execution time for conditional statements.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If a digital comparator is used, then Boolean conditions can be evaluated, but parallel execution of multilevel conditional tasks is unable

Engineering Contradiction:
Improveparallel execution capabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent enables the arithmetic and bitwise units to handle multiple conditional tasks simultaneously by evaluating multiple Boolean conditions in parallel. Each ALU unit can independently evaluate conditions and generate control signals, allowing multilevel conditional tasks to execute in parallel without requiring additional comparator hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent divides the conditional evaluation into independent arithmetic and bitwise operations that can be distributed across multiple ALU units. This segmentation allows different conditional tasks to be processed by different ALU units in parallel, thereby enabling multilevel conditional execution without increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12517712B2Execution of a conditional statement by an arithmetic and/or bitwise unit
Publication Date: 2026.01.06 CHARIOT TECHNOLOGIES LAB INC
  • US12517712B2 patent drawing
  • US12517712B2 patent drawing
  • US12517712B2 patent drawing

AI summary

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for execution of a conditional statement by an arithmetic and/or bitwise unit. A computer program that comprises a conditional statement that comprises a Boolean condition is accessed. The Boolean condition is transformed into an arithmetic and/or bitwise expression of the Boolean condition. An arithmetic and/or bitwise expression of the computer program comprises the arithmetic and/or bitwise expression of the Boolean condition in place of the Boolean condition. The arithmetic and/or bitwise expression of the computer program is executed by an arithmetic and/or bitwise operation unit of a processor.