Programmable Circuit ALU Staged Reconfiguration Throughput

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing programmable circuits face challenges in improving throughput due to the need to stop input data until all computations are completed and output results are finished, which limits their processing efficiency when switching between different processing tasks.

Innovation Solution

A processing apparatus with a programmable circuit featuring ALUs and an updating unit that updates the ALUs at the timing of the last data output from each processing stage, allowing for seamless switching between circuit settings without stopping input data, thereby enhancing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If configuration information is propagated to all ALUs simultaneously using a shift register, then all ALUs can be updated at once, but input data must be stopped until all computations are completed and output results are finished, which reduces throughput

Engineering Contradiction:
Improvedata integrityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the configuration update process by ALU stage. Each ALU updates its configuration information independently at the moment its last computed data is output, rather than waiting for all ALUs to complete. This segmentation allows overlapping of computation and reconfiguration, improving throughput while maintaining data integrity through staged updates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent prepares configuration information in advance for each ALU stage, storing it in configuration storage units. When an ALU finishes processing its last data, the pre-prepared configuration is immediately applied without waiting for other ALUs, enabling seamless transitions and continuous input data flow.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If configuration information is rewritten after all computations are completed, then data damage is prevented, but input data must be stopped during the rewrite process, reducing processing efficiency

Engineering Contradiction:
Improvedata safetyVSAvoidstop period
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Configuration information is prepared in advance in configuration storage units for each ALU stage. When an ALU completes its last computation, the pre-prepared configuration is immediately applied without requiring a global stop, thus preventing data damage while eliminating stop periods and improving processing efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic, staged reconfiguration where each ALU updates its configuration independently at the appropriate moment in the data flow. This dynamic approach allows the system to transition from static global reconfiguration to flexible incremental reconfiguration, eliminating unnecessary stop periods while ensuring data safety.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11550546B2Processing apparatus, method of controlling the same, and non-transitory computer readable storage medium
Publication Date: 2023.01.10 CANON KK
  • US11550546B2 patent drawing
  • US11550546B2 patent drawing
  • US11550546B2 patent drawing

AI summary

A processing apparatus having a programmable circuit including a plurality of ALUs, comprises a holding unit which holds configuration information for switching the programmable circuit from a first circuit setting to a second circuit setting, and timing information; and an updating unit which updates each ALU so as to switch the programmable circuit from the first circuit setting to the second circuit setting, wherein in switching from the first circuit setting to the second circuit setting after the programmable circuit has executed the first data processing, the updating unit, using the timing information, updates the first ALU at a timing at which last data of the first data processing is output from the first ALU, and updates the second ALU at a timing at which the last data is output from the second ALU.