Arithmetic Logic Unit Testing System Reducing Storage

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Solution Overview

Problem

The existing testing methods for arithmetic logic units require large storage space for expected results, making them expensive and difficult to integrate due to the need for numerous rounds of testing, which hinders miniaturization and cost-effectiveness.

Innovation Solution

A testing system and method that includes a control unit, data providing unit, input units, arithmetic logic unit, expected result unit, comparator, and test result storage unit, where the expected result unit generates and stores only one round of expected results, reducing storage needs and allowing for integration of all components on a single chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If many rounds of testing are performed to ensure accuracy and reliability, then testing reliability is improved, but storage space requirement for expected result unit increases significantly

Engineering Contradiction:
Improvetesting reliabilityVSAvoidstorage space of expected result unit
Core Design Contradiction:
ReliabilityVSVolume of stationary object

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing only the necessary test data and expected results in a compact format before actual testing. The test data is generated in advance and stored efficiently, allowing the expected result unit to store minimal data while still supporting multiple testing rounds, thus resolving the contradiction between testing reliability and storage space requirements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by generating test data and expected results through computational operations rather than storing all possible test cases. The expected result unit stores only the test data and uses computational logic to generate corresponding expected results during testing, effectively copying the testing function without requiring proportional storage space for each test case.

Inventive Principle:
Principle #26Copying

2Adaptability or versatility

If expected result unit stores expected results from many rounds of testing, then testing coverage is improved, but device integration difficulty increases and cost increases

Engineering Contradiction:
Improvetesting coverageVSAvoidintegration difficulty and cost
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the expected result unit to perform multiple functions: storing test data, generating expected results through computational operations, and supporting multiple testing rounds. This multi-functional design eliminates the need for separate storage for each test case, reducing overall device complexity while maintaining comprehensive testing coverage.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses parameter changes by transforming the storage requirement from storing all possible test cases to storing only essential test data parameters. The expected result unit stores minimal parameters and generates the rest through computational operations, changing the fundamental approach from data-intensive storage to computation-intensive processing, thus reducing device complexity and cost.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If expected result unit is made larger to store more test data, then testing accuracy is improved, but miniaturization is hindered

Engineering Contradiction:
Improvetesting accuracyVSAvoiddevice size for miniaturization
Core Design Contradiction:
Measurement precisionVSVolume of moving object

Solution Approach 1:

The patent applies extraction by separating the storage function from the computation function. The expected result unit extracts and stores only the essential test data parameters, while the computation of expected results is performed through dedicated computational logic. This separation allows the storage component to be minimized for miniaturization while maintaining testing accuracy through computational generation of expected results.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9702932B2Arithmetic logic unit testing system and method
Publication Date: 2017.07.11 SHANGHAI XINHAO MICROELECTRONICS
  • US9702932B2 patent drawing
  • US9702932B2 patent drawing
  • US9702932B2 patent drawing

AI summary

A testing system and method for an arithmetic logic unit are provided. The system includes: a control unit, a data providing unit, a first input unit, a second input unit, an arithmetic logic unit, an expected result unit, a comparator and a test result storage unit. The control unit controls the testing process. The data providing unit provides data for the first input unit, the second input unit and the expected result unit. The first input unit and the second input unit provide test data for the arithmetic logic unit. The arithmetic logic unit performs an operation and provides an operation result for the comparator. The expected result unit generates an expected result and provides the expected result of this round of testing for the comparator. The comparator compares the operation result with the expected result, and provides a comparison result for the test result storage unit.