Always Migrate Protocol for Shared Cache Directory
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Solution Overview
Problem
In computing systems, directory-based cache coherency protocols reduce network traffic and latency but require additional hardware, increasing cost and power consumption, while broadcast protocols lead to bandwidth issues and increased latency due to unconditional probe broadcasting.
Innovation Solution
The Always Migrate protocol optimizes data migration by forcing ownership transfer regardless of cache states, eliminating the need for cache state feedback and simplifying directory implementation, and stores directory entries in shared cache memory to reduce hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If directory-based cache coherency protocols are used, then network traffic and latency are reduced, but additional hardware is required increasing cost and power consumption
Solution Approach 1:
The patent combines the directory structure with the existing cache memory hierarchy by implementing directory entries within the L2 cache or L3 cache structures. This merging approach allows the system to benefit from directory-based coherency protocols without adding separate dedicated directory hardware, thereby reducing the hardware overhead while maintaining low latency performance.
Solution Approach 2:
The patent makes the cache memory structure serve multiple functions: it acts as both the cache for storing data blocks and as the directory for tracking coherency information. By making directory entries a subset of cache entries or co-locating them within the same memory structure, the system achieves multi-functionality that eliminates the need for separate directory hardware.
2Reliability
If separate directory storage is implemented, then coherency management is improved, but hardware requirements and system cost increase
Solution Approach 1:
The patent merges the directory storage function with existing cache memory structures. Directory entries are implemented as specific entries within the L2 or L3 cache, or as a subset of the cache hierarchy, eliminating the need for separate dedicated directory storage hardware while maintaining reliable coherency management.
Solution Approach 2:
The cache memory structure is designed to serve dual purposes: storing actual data blocks and maintaining directory information for coherency tracking. This multi-functional design allows the same hardware resources to support both data storage and coherency management, reducing overall hardware requirements.
Data Source
AI summary
A method and apparatus for accelerated shared data migration between cores. Using an Always Migrate protocol, when a migratory probe hits a directory entry in either modified or owned state, the entry is transitioned to an owned state, and a source done command is sent without sending cache block ownership or state information to the directory.