AMB ECC Controller for Transparent Memory Error Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Legacy motherboards without memory controllers that support error correction lack the capability to utilize error-correction code (ECC) capabilities, and existing memory modules do not have transparent ECC solutions for fully-buffered memory modules.

Innovation Solution

Integrating an ECC controller within the Advanced Memory Buffer (AMB) of fully-buffered memory modules, which is transparent to the motherboard's memory controller, allowing for local ECC generation and checking, and enabling error correction without requiring support from the motherboard's memory controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC controller is integrated within AMB, then error correction capability is added to memory modules, but device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidAMB structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ECC controller with the Advanced Memory Buffer (AMB) into a single integrated component. The ECC controller is positioned within the AMB chip structure, sharing physical and functional resources. This integration allows error correction functionality to be added to memory modules without requiring separate ECC controller chips, thereby reducing overall system complexity while maintaining reliability improvements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated AMB-ECC controller serves multiple functions: it acts as both the memory buffer controller for data transmission and the ECC controller for error detection and correction. This multi-functionality eliminates the need for separate dedicated ECC controller hardware, resolving the complexity issue while enabling error correction capabilities in legacy memory module architectures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If ECC controller is integrated within AMB, then transparent error correction is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvetransparent error correctionVSAvoidmemory module manufacturing
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The memory module achieves self-service error correction through the integrated AMB-ECC controller that operates autonomously within the module. The ECC functionality is embedded in the AMB chip itself, allowing the memory module to perform error detection and correction without external intervention from the motherboard or CPU. This transparency simplifies system architecture while requiring sophisticated manufacturing processes for the integrated chip.

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If single-bit defect memory chips are retained, then manufacturing cost is reduced, but error rate increases

Engineering Contradiction:
Improvemanufacturing costVSAvoidmemory error rate
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by incorporating ECC capabilities directly into the memory module's AMB before the chips are deployed in the system. The ECC controller proactively detects and corrects errors, including single-bit defects, before they can cause system failures. This allows manufacturers to accept and retain memory chips with minor defects at lower cost, knowing the ECC mechanism will prevent these defects from becoming critical errors in operation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS7487428B2Fully-buffered memory-module with error-correction code (ECC) controller in serializing advanced-memory buffer (AMB) that is transparent to motherboard memory controller
Publication Date: 2009.02.03 KINGSTON TECHNOLOGY CORP
  • US7487428B2 patent drawing
  • US7487428B2 patent drawing
  • US7487428B2 patent drawing

AI summary

An error-correcting fully-buffered memory module can detect and correct some errors in data read from memory chips. An error correction code ECC controller is added to the Advanced Memory Buffer (AMB) on the memory module that fully buffers memory requests sent as serial packets. The error correction controller generates ECC bits for write data, and both the ECC bits and the write data are written to the memory chips by a DRAM controller in the AMB. During reads, an ECC checker generates a syndrome and can activate an error corrector to correct data or signal a non-correctable error. The corrected data is formed into serial packets sent back to the motherboard by the AMB. Configuration data for the ECC controller could be first programmed into a serial-presence-detect electrically-erasable programmable read-only memory (SPD-EEPROM) on the memory module, and then copied to error-correction configuration registers on the AMB during power-up.