AMBA Interconnect Protection Sideband for Fault Detection
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Solution Overview
Problem
The Advanced Microcontroller Bus Architecture (AMBA) AXI standard lacks adequate fault detection mechanisms for secure master-slave communication, leading to complex interconnect designs and increased system latency, particularly in functional-safety applications, and does not define signal widths, causing compatibility issues between masters, slaves, and interconnects.
Innovation Solution
A low-complexity interconnect design that includes an input, encoder, and output, where the encoder generates protection information (parity or EDC) for grouped channel data and passes it via a sideband channel to the destination for decoding, ensuring fault detection and compatibility by aligning signal widths through bit-stuffing, and allowing seamless integration with any AMBA-standard components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Error Detection and Correction (EDC) schemes are employed within components and parity schemes are used for detecting errors on the AMBA interface, then fault detection capability is improved, but device complexity and system latency increase
Solution Approach 1:
The patent extracts the EDC generation function from the interconnect and places it in the source component. The source generates EDC for its output channels independently, and the interconnect simply forwards these EDC signals without processing them. This extraction eliminates the complexity of EDC generation at the interconnect while maintaining fault detection capability at the destination.
Solution Approach 2:
The patent introduces a sideband channel as an intermediary to transport EDC information from source to destination without requiring the interconnect to process or generate EDC. The sideband channel acts as a dedicated communication path that carries protection information separately from the main data channels, simplifying the interconnect design while preserving reliability.
2Reliability
If parity check and EDC generation are performed at the interconnect input and output respectively, then fault detection coverage is improved, but system latency increases
Solution Approach 1:
The patent applies preliminary action by having the source generate EDC for its output channels before data transmission. This pre-computation of EDC at the source eliminates the need for time-consuming EDC generation at the interconnect, reducing system latency while maintaining comprehensive fault detection coverage through the sideband channel transport.
3Adaptability or versatility
If the AMBA AXI standard does not define signal widths, then flexibility in component design is improved, but compatibility between masters, slaves, and interconnects deteriorates
Solution Approach 1:
The patent applies universality by designing the interconnect to handle multiple signal width configurations through configurable width selection logic. The interconnect can be configured to match different master and slave signal widths, and automatically performs width adaptation. This universal design maintains the flexibility of undefined signal widths in the standard while ensuring compatibility across different components through automated width matching and bit-stuffing mechanisms.
Data Source
AI summary
An interconnect including an input couplable to a source, and an encoder coupled to the input. The encoder is configured to: group information that is received from the source via a same channel; size the grouped information to a common width; and apply protection to the sized grouped information.