Ambient Noise-Reduction Circuit With Fine Group Delay Tuning
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Solution Overview
Problem
Existing ambient noise-reduction systems for earphones face limitations due to phase lags and group delays in feedback loops, which restrict the frequency range of noise reduction and are impractical to adjust, especially with analogue filters, making it difficult to achieve effective noise cancellation across a wide frequency band.
Innovation Solution
A digital circuit arrangement that converts analogue signals into N-bit digital signals, using a digital delta-sigma modulator and adjustable filtering to minimize group delay, allowing for precise noise reduction with low latency and easy adjustment of the processing chain, suitable for both feedback and feed-forward systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If analogue filters are used in feedback loops for ambient noise reduction, then the system can be implemented with simpler components, but the group delay becomes difficult to adjust and the frequency range is restricted
Solution Approach 1:
The patent replaces analogue filter circuits with a digital signal processing system that uses a digital signal processor to perform filtering operations. This substitution allows for programmable filter characteristics that can be adjusted via software, providing both ease of implementation and adaptability across different frequency ranges without the constraints of physical analogue component limitations.
Solution Approach 2:
The patent implements dynamic adjustment capabilities through a digital signal processor that can modify filter parameters in real-time. The system includes adjustable equalization filters and noise reduction algorithms that can be tuned during operation to optimize performance across varying frequency conditions, transforming the static analogue filter into a dynamic, adaptive system.
2Object-affected harmful factors
If the feedback loop is designed for noise reduction, then ambient noise can be cancelled, but the group delay cannot be easily adjusted to optimize performance across different frequencies
Solution Approach 1:
The patent implements dynamic adjustment capabilities through a digital signal processor that can modify filter parameters in real-time. The system includes adjustable equalization filters and noise reduction algorithms that can be tuned during operation to optimize performance across varying frequency conditions, transforming the static analogue filter into a dynamic, adaptive system.
Solution Approach 2:
The patent changes the fundamental parameters of the filtering system by transitioning from fixed analogue filter characteristics to digitally controllable parameters. The digital signal processor allows independent adjustment of group delay, filter order, cutoff frequencies, and other parameters without changing physical components, enabling optimization of both noise reduction and phase response simultaneously.
3Adaptability or versatility
If conventional digital filters are used, then processing can be adjusted, but the group delay is still significant and limits the frequency range
Solution Approach 1:
The patent segments the filtering function into multiple parallel processing paths within the digital signal processor. By dividing the filter into smaller, independent sections that process different frequency bands or signal components separately, the system reduces the overall group delay while maintaining adjustable processing capabilities for each segment.
Solution Approach 2:
The patent replaces conventional digital filter architectures with an optimized digital signal processing implementation that uses direct digital synthesis and fast Fourier transform techniques. This substitution reduces computational complexity and processing latency, minimizing group delay while preserving full programmability and adjustability of filter characteristics.
Data Source
AI summary
A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.


