AMOLED Driving Backplane Shielding Parasitic Capacitance
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Solution Overview
Problem
Current display technologies face challenges in achieving high frame rates while maintaining display effectiveness, particularly in terms of signal coupling between data lines and gate electrodes in AMOLED panels, which affects the display's performance and efficiency.
Innovation Solution
The proposed solution involves a driving backplane design with a pixel driving circuit that includes a driving transistor, a switching transistor, and conductive patterns arranged in specific layers and orientations to shield parasitic capacitance between data lines and gate electrodes, reducing signal coupling and improving display efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data lines and gate electrodes are arranged in conventional AMOLED display structures, then the display panel can be manufactured with standard processes, but parasitic capacitance coupling occurs between data lines and gate electrodes which degrades display performance and limits frame rate
Solution Approach 1:
An insulating layer is introduced as an intermediary between the data line and the gate electrode. This insulating layer acts as a mediator that electrically isolates the two conductive elements, preventing parasitic capacitance coupling while allowing the display to maintain its conventional structure and manufacturing process
Solution Approach 2:
The conventional structure is segmented by introducing additional insulating layers at specific locations. The insulating layer is positioned between the data line and gate electrode, dividing the space into electrically isolated regions and eliminating the harmful capacitive coupling path
2Reliability
If the display panel uses conventional data line and gate electrode arrangements, then manufacturing is simplified, but parasitic capacitance reduces display effectiveness and operational efficiency
Solution Approach 1:
The insulating layer serves as a mediator that improves display effectiveness by eliminating parasitic capacitance effects. This intermediary element enhances the reliability of the display operation without requiring complex redesigns of the overall conductive pattern arrangement
Solution Approach 2:
The insulating layer is applied locally at specific critical locations where data lines intersect or are positioned near gate electrodes. This localized approach addresses the parasitic capacitance problem at specific hotspots without requiring global changes to the entire conductive pattern structure
Data Source
AI summary
A driving backplane includes: a base, and pixel driving circuits, data lines and first power supply voltage lines that are disposed on the base. The pixel driving circuit is electrically connected to a data line and a first power supply voltage line. The pixel driving circuit includes a driving transistor, a first switching transistor, and a first conductive pattern located on a side, away from the base, of a gate of the driving transistor and a gate of the first switching transistor. The first conductive pattern is electrically connected to the gate of the driving transistor through a first via, and to a second electrode of the first switching transistor through a second via. An orthogonal projection of the first conductive pattern on the base is located within an orthogonal projection of the first power supply voltage line on the base.