AMOLED Display Controller Sleep Mode Power Reduction
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Solution Overview
Problem
Conventional AMOLED display devices consume significant power in sleep mode due to incomplete shutdown of the display serial interface, particularly in the driver IC, limiting the effectiveness of existing power-saving methods.
Innovation Solution
The proposed solution involves efficiently managing clock signals by controlling an oscillator register to transition the set controller through sleep modes (sleep, clock-off, and deep sleep) by adjusting voltages applied to clock and data lanes, thereby minimizing power consumption. This includes maintaining image data signals at a consistent voltage while adjusting clock signals to reduce power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the set controller enters sleep mode with the DSI interface partially active, then basic functionality is maintained, but power consumption increases due to continuous clock signal operation
Solution Approach 1:
The patent implements dynamic power management by introducing multiple sleep modes (sleep mode and deep sleep mode) that allow the system to transition between different operational states. The set controller can dynamically adjust its operational state based on the duration of sleep mode, switching from a first sleep mode to a second sleep mode after a predetermined time period, thereby optimizing power consumption while maintaining necessary functionality.
Solution Approach 2:
The patent employs periodic monitoring of sleep mode duration to determine when to transition between different power-saving states. A timer or counter tracks the elapsed time in sleep mode, and when a predetermined threshold is reached, the system periodically transitions from the first sleep mode to the second sleep mode, creating a rhythmic pattern of power state adjustments that balances functionality and power savings.
2Use of energy by moving object
If the clock signal is completely turned off in sleep mode, then power consumption is minimized, but timing synchronization is lost
Solution Approach 1:
The patent applies local quality by differentiating the operational state of different signal lanes. The data lane is maintained in a low-power state while the clock lane is completely turned off in the second sleep mode. This localized approach allows the system to minimize power consumption by disabling only the clock signal while preserving the ability to restore timing synchronization when exiting sleep mode, without requiring continuous clock operation.
Solution Approach 2:
The patent implements preliminary action by maintaining the capability to restore clock signals and timing synchronization in advance before full operation is required. The system prepares for rapid wake-up by keeping essential circuitry in a ready state and can quickly restore the clock signal when transitioning from sleep mode, ensuring timing synchronization is reestablished without significant delay despite the clock being completely off during sleep.
3Use of energy by moving object
If additional resistor configuration is added to enable deep sleep mode, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent achieves multi-functionality by utilizing existing control mechanisms and circuitry to implement multiple sleep modes without requiring additional physical components. The set controller uses its existing mode control logic to differentiate between first sleep mode and second sleep mode, leveraging software or register-based control rather than hardware modifications. This approach allows the system to provide enhanced power-saving functionality while avoiding the complexity of additional resistor configurations or dedicated deep sleep circuitry.
Data Source
AI summary
The present invention relates to a display device and a method of operating the display device that reduces power consumption, the method including: operating the display device in a normal driving mode to display an image on a display panel according to an image data signal; operating the display device in a sleep mode, by adjusting a clock signal and an image data signal transmitted from a set controller to of the display device to a first voltage; measuring a sleep mode time period during which the display device operates in the sleep mode; and adjusting a register value of the set controller when the measured sleep mode time period exceeds a first reference time period and maintaining the clock signal at a second voltage according to the adjusted register value as a clock-off mode.