Jumper-Based Power Wiring for AMOLED Display Panel Carbonization Prevention

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Solution Overview

Problem

The increasing size of AMOLED display panels and the resulting higher current demand lead to burn and carbonization of the Planarization layer during high-voltage testing, causing conduction abnormalities between VDD and VSS power wirings.

Innovation Solution

The display panel design includes a first and second power supply line on the same layer with a jumper connecting both sides of an opening on the encapsulation cover plate, allowing for efficient heat dissipation and preventing carbonization by using a jumper with lower resistivity than the gate layer material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high voltage is applied to VDD-VSS wiring during testing, then testing capability is improved, but Planarization layer is burned and carbonized

Engineering Contradiction:
Improvetesting capabilityVSAvoidburn and carbonization of Planarization layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The jumper is extracted from the Planarization layer structure and placed on the encapsulation cover plate, separating the high-current testing function from the vulnerable Planarization layer. This allows high voltage testing to proceed without the Planarization layer being exposed to harmful heat and current.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The jumper acts as an intermediary conductive element that carries high testing currents between the VDD and VSS power supply lines without requiring the Planarization layer to be conductive. It mediates the testing function while protecting the Planarization layer from damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If current required by light emitting pixels is increased, then display size and pixel count are improved, but heat generation increases causing Planarization layer carbonization

Engineering Contradiction:
Improvedisplay size and pixel countVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The conductive path for high current is extracted from the Planarization layer and implemented as a separate jumper on the encapsulation cover plate. This eliminates the Planarization layer from the high-current path, preventing heat generation within the layer while still supporting increased pixel counts and display sizes.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The electrical conductivity parameter is changed from being an inherent property of the Planarization layer to being provided by a separate jumper material with appropriate conductive properties. This allows optimization of current carrying capacity without compromising the structural integrity of the Planarization layer.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If VDD and VSS power supply lines are arranged on the same layer, then wiring density is improved, but conduction abnormalities occur when Planarization layer carbonizes

Engineering Contradiction:
Improvewiring densityVSAvoidconduction abnormality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The jumper is extracted as a separate component on the encapsulation cover plate, completely separating the high-current conduction function from the Planarization layer. This ensures that even if the Planarization layer carbonizes, the VDD-VSS conduction path through the jumper remains intact and reliable.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents carbonization of the Planarization layer and avoids abnormal display issues by reducing heat output during high-voltage testing, ensuring reliable panel performance.

Implementation Method 1

the second power supply lines on both sides of the opening are electrically connected by a jumper arranged on the encapsulation cover plate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

allowing for efficient heat dissipation and preventing carbonization by using a jumper with lower resistivity than the gate layer material

Methodology Applied
Scientific EffectHeat dissipation: Conduction (thermal)

Data Source

PatentUS11538898B2Display panel and display apparatus
Publication Date: 2022.12.27 BEIJING BOE TECH DEV CO LTD
  • US11538898B2 patent drawing
  • US11538898B2 patent drawing
  • US11538898B2 patent drawing

AI summary

A display panel and a display apparatus are provided. The display panel includes an array substrate and an encapsulation cover plate, wherein a first power supply line and a second power supply line are arranged on a same layer on the array substrate, the second power supply line is disconnected by an opening, a first connecting line is connected with the first power supply line through the opening, a second connecting line is connected with the second power supply line, and the second power supply lines on both sides of the opening are electrically connected by a jumper arranged on the encapsulation cover plate.