Semiconductor Layer Amorphization for Selective GAAFET Etching

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Solution Overview

Problem

As semiconductor devices continue to scale down, challenges arise in maintaining device performance and reducing fabrication costs due to increased complexity and defects in field-effect transistors, particularly in non-planar transistor architectures like FinFETs and GAAFETs, where etching selectivity and efficiency become critical issues.

Innovation Solution

The method involves forming a semiconductor device by patterning first and second semiconductor layers, implanting the first semiconductor region to amorphize it, and using a selective etchant to improve etch rate and selectivity, allowing for the use of an inexpensive alkaline solution in the silicon/silicon germanium system, thereby enhancing the fabrication process of GAAFETs or FinFETs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional etching methods are used for non-planar transistor architectures, then fabrication complexity is reduced, but etch rate and selectivity deteriorate

Engineering Contradiction:
Improveetch rateVSAvoidetch selectivity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The method applies ion implantation to amorphize the semiconductor layer before etching. This preliminary action modifies the crystal structure of the semiconductor material, transforming it from a crystalline to an amorphous state, which then enables selective etching with improved both etch rate and selectivity for non-planar transistor architectures

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the physical state parameter of the semiconductor material from crystalline to amorphous through ion implantation. This parameter change fundamentally alters the etching characteristics, allowing the use of alkaline etchants to achieve both high etch rates and high selectivity that were previously contradictory

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If expensive selective etchants are used to improve etch selectivity, then manufacturing precision improves, but fabrication cost increases

Engineering Contradiction:
Improveetch selectivityVSAvoidfabrication cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The method enables the use of inexpensive alkaline etchants (such as ammonium hydroxide-based solutions) by first amorphizing the semiconductor layer through ion implantation. The amorphized layer acts as a temporary vulnerable state that can be selectively removed by cheap etchants, eliminating the need for expensive proprietary selective etchants

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

By changing the crystal structure parameter from crystalline to amorphous, the invention fundamentally alters the chemical reactivity of the semiconductor material, making it susceptible to inexpensive alkaline etchants while maintaining high selectivity, thus resolving the cost-selectivity tradeoff

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves etch rate and selectivity, leading to more efficient fabrication of non-planar transistors with improved performance and reduced costs by utilizing an inexpensive etchant, addressing the complexities and challenges associated with scaling down in semiconductor device manufacturing.

Implementation Method 1

The first semiconductor region is implanted to form an amorphized semiconductor region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS11854816B2Semiconductor devices and methods of manufacturing thereof
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11854816B2 patent drawing
  • US11854816B2 patent drawing
  • US11854816B2 patent drawing

AI summary

A method of fabricating a semiconductor device is described. A substrate is provided. A first semiconductor region of a first semiconductor material is formed over the substrate and adjacent a second semiconductor region of a second semiconductor material. The first and second semiconductor regions are crystalline. An etchant is selective to etch the first semiconductor region over the second semiconductor region. The entire first semiconductor region is implanted to form an amorphized semiconductor region. The amorphized semiconductor region is etched with the etchant using the second semiconductor region as a mask to remove the amorphized semiconductor region without removing the second semiconductor region.