Amorphous Carbon Hard Mask Selective Etching
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Solution Overview
Problem
As design rules of semiconductor devices decrease, production yields and productivity decline due to challenges in the etching processes used in manufacturing, particularly in forming and removing hard mask layers without damaging underlying patterns and spacers.
Innovation Solution
The method involves forming a first and second hard mask layer on a semiconductor substrate, with the second hard mask layer being an amorphous carbon layer doped with impurities, and using a wet etching process with sulfuric acid to selectively remove the second hard mask layer, maintaining a high etch rate ratio while minimizing damage to the spacer and subsequent layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to remove hard mask layers, then the hard mask layers can be removed, but the underlying patterns and spacers are damaged
Solution Approach 1:
The hard mask structure is divided into multiple layers (first hard mask layer and second hard mask layer) with different materials and etching characteristics. The second hard mask layer (amorphous carbon) is specifically designed to be selectively removable while protecting the first hard mask layer and underlying patterns, enabling staged removal without damage
Solution Approach 2:
The amorphous carbon layer acts as an intermediary between the etching process and the underlying spacer/insulating layers. It provides a sacrificial layer that absorbs etching damage and protects the critical underlying structures during the etching process
2Area of moving object
If design rules are decreased to improve device density, then more devices can be integrated, but etching process control becomes more difficult
Solution Approach 1:
Different regions of the hard mask structure have different local qualities - the second hard mask layer has high etch selectivity and forms a protective interface, while the first hard mask layer provides structural support. This local differentiation enables precise control at reduced design rules
Solution Approach 2:
The etching process parameters are optimized by changing the material composition (amorphous carbon with specific doping), thickness ratios, and etchant selection to achieve selective removal. The etch rate ratio between the second hard mask layer and underlying layers is controlled within 100:1 to 10,000:1 through parameter optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reproducibility of subsequent processes, reduces defects, and maintains the integrity of the spacer and insulating layers, thereby improving production yields and productivity in semiconductor device manufacturing.
Implementation Method 1
removing the second hard mask layer by a wet etching process
Implementation Method 2
A ratio of etch rates between the second hard mask layer and the second pattern during the etching process may be in a range of about 100:1 to about 10,000:1
Implementation Method 3
the second hard mask layer may include an amorphous carbon layer formed by a chemical vapor deposition (CVD) method
Implementation Method 4
the second hard mask layer may include a carbon containing layer doped with impurities
Data Source
AI summary
Methods of forming a semiconductor device are provided. The methods may include forming an insulating layer including silicon on a substrate and sequentially forming a first hard mask layer and a second hard mask layer on the substrate. The first hard mask layer may include carbon, and the second hard mask layer may include carbon and impurities. The first and second hard mask layers may expose at least a portion of the insulating layer. The methods may also include performing an etching process to selectively remove the second hard mask layer with respect to the insulating layer. A ratio of etch rates between the second hard mask layer and the insulating layer during the etching process may be in a range of about 100:1 to about 10,000:1.


