Composite Amorphous Carbon Layer for Sub-32 nm Stack Defectivity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in patterning sub-32 nm features on semiconductor substrates due to high surface roughness of materials like polysilicon, leading to defects such as stack defectivity, which can cause lithographic and patterning issues.
Innovation Solution
A method involving the deposition of a composite amorphous carbon layer, comprising an amorphous carbon initiation layer and a bulk amorphous carbon layer, is used to minimize defects. This is achieved by introducing hydrocarbon and diluent source gases into a process chamber, generating a plasma to form the amorphous carbon layers, which are then used to pattern and etch features on the substrate, reducing lateral expansion and subsequent stack defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If polysilicon is used as the core patterning material, then the pattern can be transferred into the substrate, but the high surface roughness of polysilicon causes defects to be decorated into bigger size defects, leading to stack defectivity
Solution Approach 1:
The patent changes the material parameter from polysilicon to amorphous carbon, which fundamentally alters the surface roughness characteristic. Amorphous carbon provides a planar surface that prevents defect decoration, thereby resolving the stack defectivity issue while maintaining pattern transfer capability
Solution Approach 2:
The patent employs a composite structure consisting of a core pattern layer and an amorphous carbon layer. This composite material approach combines the pattern definition capability of the core material with the surface planarization properties of amorphous carbon, achieving both pattern transfer and defect reduction
2Productivity
If conventional lithographical technology is used to print the core pattern, then the patterning process can be completed, but the minimum feature size cannot be reduced below 32 nm due to optical resolution limits
Solution Approach 1:
The patent segments the patterning process into multiple steps: first printing a core pattern at relaxed dimensions, then forming spacers around the core features. This segmentation allows the final feature size to be determined by the spacer thickness rather than direct lithography resolution, enabling sub-32 nm features while maintaining conventional lithography throughput
3Ease of manufacture
If a single bulk amorphous carbon layer is deposited, then the layer can be formed on the substrate, but the stack defectivity is not sufficiently reduced compared to using a composite amorphous carbon initiation layer and bulk amorphous carbon layer
Solution Approach 1:
The amorphous carbon deposition is segmented into two distinct layers: an initiation layer deposited at low hydrocarbon flow ratio to provide surface planarization and defect suppression, and a bulk layer deposited at high hydrocarbon flow ratio to provide the required film thickness. This segmentation achieves superior defect reduction compared to single-layer deposition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The composite amorphous carbon layer significantly reduces stack defectivity by at least an order of magnitude compared to using amorphous carbon bulk film alone, ensuring a planar surface for subsequent layer deposition and minimizing defects like broken patterns and bridged lines.
Implementation Method 1
introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber
Implementation Method 2
forming an amorphous carbon initiation layer on the substrate, forming a bulk amorphous carbon layer on the amorphous carbon initiation layer
Data Source
AI summary
Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less, and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater.