Amorphous Dielectric Regions Block Grain Boundary Leakage in Memory Cells
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Solution Overview
Problem
Conventional memory cells using crystalline ultra-high k dielectric materials for charge-blocking face issues with grain boundaries that allow contaminating materials to leak in, leading to defects and unwanted trapped charge, which degrades their performance and reliability.
Innovation Solution
Incorporating amorphous regions between the charge-retaining material and the charge-blocking dielectric material, and between the charge-blocking dielectric material and the control gate material, to prevent the migration of chemical species and reduce defects, thereby enhancing the stability and performance of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If crystalline ultra-high k dielectric materials are used as charge-blocking materials, then the dielectric constant is increased (k ≥ 15), but grain boundaries form which allow contaminating materials to leak and create defects
Solution Approach 1:
The patent employs a composite dielectric structure consisting of a crystalline ultra-high k dielectric material layer combined with an amorphous dielectric material layer. The crystalline layer provides high dielectric constant (k ≥ 15) for effective charge blocking, while the amorphous layer fills the grain boundaries between crystalline grains, preventing contaminant leakage paths. This composite approach allows simultaneous achievement of high dielectric constant and high reliability by combining the advantages of both material types.
2Reliability
If crystalline ultra-high k dielectric materials are used, then charge-blocking capability is improved, but grain boundaries create high density of defects and trapped charge
Solution Approach 1:
The patent extracts and removes the harmful grain boundary structures from the dielectric material system. By using an amorphous dielectric material layer instead of relying solely on crystalline material, the grain boundaries that generate defects and trapped charge are eliminated. The amorphous structure provides a continuous, defect-free matrix that blocks charge leakage while maintaining the necessary dielectric properties.
3Reliability
If amorphous regions are added to prevent chemical species migration, then reliability is improved, but device structure becomes more complex
Solution Approach 1:
The patent segments the dielectric material into distinct functional layers: a crystalline ultra-high k dielectric material layer for primary charge blocking and an amorphous dielectric material layer for preventing chemical species migration along grain boundaries. This segmentation allows each layer to perform its specific function optimally while maintaining a relatively simple overall structure that can be integrated into existing memory device architectures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of amorphous regions effectively prevents the migration of chemical species, reducing defects and improving the electrical properties of memory cells, ensuring better performance and stability compared to cells lacking these regions.
Implementation Method 1
Incorporating amorphous regions between the charge-retaining material and the charge-blocking dielectric material, and between the charge-blocking dielectric material and the control gate material, to prevent the migration of chemical species
Data Source
AI summary
Some embodiments include memory cells. The memory cells may include a tunnel dielectric material, a charge-retaining region over the tunnel dielectric material, crystalline ultra-high k dielectric material over the charge-retaining region, and a control gate material over the crystalline ultra-high k dielectric material. Additionally, the memory cells may include an amorphous region between the charge-retaining region and the crystalline ultra-high k dielectric material, and/or may include an amorphous region between the crystalline ultra-high k dielectric material and the control gate material. Some embodiments include methods of forming memory cells which contain an amorphous region between a charge-retaining region and a crystalline ultra-high k dielectric material, and/or which contain an amorphous region between a crystalline ultra-high k dielectric material and a control gate material.