Amorphous Enhancer Layer for Trench Isolation in Semiconductor Structures

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Solution Overview

Problem

As design rules scale to smaller dimensions, selective epitaxial growth in semiconductor devices faces limitations due to preferential orientations and surface migration issues, leading to shallowing of trenches and reduced isolation effectiveness between active areas, which affects device performance and increases the risk of short circuits.

Innovation Solution

The use of an amorphous enhancer layer deposited over silicon pillars, grown using solid phase epitaxy, to enlarge active areas and maintain uniform trench isolation depths, combined with selective etching to control the depth of isolation trenches and deposition of an isolation material to prevent shallowing, allowing for deeper and more uniform trench formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If selective epitaxial growth is used to form discrete device active areas, then the active areas can be formed with preferential orientations, but surface migration during annealing causes shallowing of trenches and reduced isolation effectiveness

Engineering Contradiction:
Improvetrench isolation depth uniformityVSAvoidisolation effectiveness
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

An amorphous enhancer layer is deposited as an intermediary material over the silicon pillars and within the isolation trenches. This enhancer layer serves as a mediator that prevents surface migration during annealing, maintaining trench depth uniformity and isolation effectiveness while allowing selective epitaxial growth to proceed on the silicon pillars.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The amorphous enhancer layer is deposited in advance before the annealing and epitaxial growth processes. This preliminary action prepares the structure to resist surface migration during subsequent high-temperature processing, ensuring trench isolation depth is maintained before the actual device formation occurs.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If design rules are scaled to smaller dimensions, then device density is increased, but trench shallowing becomes more severe and isolation effectiveness is reduced

Engineering Contradiction:
Improvedevice densityVSAvoidtrench isolation depth
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The amorphous enhancer layer acts as a protective intermediary that becomes increasingly important at smaller design rules. As devices are scaled down and trenches become shallower, the enhancer layer provides a consistent barrier against surface migration, maintaining isolation depth uniformity even as overall dimensions decrease.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If deeper trenches are formed to improve isolation, then isolation effectiveness increases, but selective epitaxial growth becomes more difficult due to surface migration

Engineering Contradiction:
Improveisolation effectivenessVSAvoidtrench depth uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The amorphous enhancer layer serves as a mediator that enables deeper trenches to be formed and maintained. By preventing surface migration during annealing, the enhancer layer ensures that deep trenches retain their depth uniformity, making both deep trench formation and selective epitaxial growth feasible.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the formation of discrete device active areas, maintains effective isolation between neighboring devices, and reduces the risk of short circuits by preventing shallowing of trenches, thereby improving device performance and reliability as design rules shrink.

Implementation Method 1

grown using solid phase epitaxy

Methodology Applied
Scientific EffectSolid phase epitaxy: Epitaxy

Data Source

PatentUS11469103B2Semiconductor structure formation
Publication Date: 2022.10.11 MICRON TECHNOLOGY INC
  • US11469103B2 patent drawing
  • US11469103B2 patent drawing
  • US11469103B2 patent drawing

AI summary

Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.