Amorphous Gate Metal Layer for Leakage Current Reduction
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Solution Overview
Problem
The reduction of transistor gate dielectric layer dimensions leads to increased leakage current and power consumption, and high-temperature annealing to reduce defects can damage the gate metal structure.
Innovation Solution
A gate electrode with an amorphous metal layer, comprising an amorphous metal alloy or compound with varying atomic radii, is used, which is formed through atomic layer deposition or chemical vapor deposition to ensure uniform distribution and reduce defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature annealing is performed to reduce defects in the high-k dielectric layer, then the uniform distribution of threshold voltage is improved, but the gate metal structure evaporates and the high-k dielectric layer and gate metal layer are damaged
Solution Approach 1:
The patent changes the temperature parameter from high-temperature annealing to low-temperature annealing (below the evaporation temperature of the gate metal material). This parameter change allows defect reduction in the high-k dielectric layer while preventing gate metal evaporation and structural damage, thereby resolving the contradiction between improving threshold voltage uniformity and avoiding damage to the gate metal structure
Solution Approach 2:
The patent introduces an intermediary material layer between the high-k dielectric layer and the gate metal layer. This intermediary layer acts as a protective barrier during annealing processes, allowing the high-k dielectric layer to be treated at temperatures that would otherwise cause gate metal evaporation, thus enabling defect reduction without damaging the gate metal structure
2Loss of energy
If the dimension of the gate dielectric layer is reduced to decrease leakage current and power consumption, then the transistor performance is improved, but the gate dielectric layer dimension reaches a critical limit where further reduction causes dramatic increase in leakage current and power consumption
Solution Approach 1:
The patent employs a composite gate structure consisting of a high-k dielectric layer combined with a gate metal layer (such as TiN). This composite material approach allows achieving the desired electrical performance with a thicker effective gate dielectric equivalent, thereby reducing leakage current and power consumption without requiring further reduction of the physical gate dielectric layer thickness to critical limits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The amorphous gate metal layer enhances carrier mobility and improves the uniformity of threshold voltage distribution, reducing leakage current and power consumption while avoiding damage from high-temperature annealing.
Implementation Method 1
forming an amorphous gate metal layer on the gate dielectric layer. Forming the amorphous gate metal layer may include forming an amorphous metal alloy material layer
Implementation Method 2
forming an amorphous gate metal layer on the gate dielectric layer. Forming the amorphous gate metal layer may include forming an amorphous metal alloy material layer
Data Source
AI summary
A gate electrode and method for manufacturing the same includes an amorphous gate metal layer. The amorphous gate metal layer includes an amorphous metal alloy material layer having at least two metallic elements of an amorphous material or an amorphous metal compound material layer having at least one metallic element and at least one non-metallic element selected from the IIIA group, the IVA group, and the VA group of the Periodic Table. The atoms are arranged evenly in the amorphous gate metal layer, there is no noticeable grains and grain boundaries, so that no defects will be generated through a carrier recombination, and the carrier mobility is increased and the carrier can be uniformly distributed.