Amorphous Hf1-xZrxO2 Gate Insulator for Low-Leakage Scaling

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Solution Overview

Problem

Existing semiconductor devices face challenges with scaling limitations and increasing power consumption, particularly due to the use of crystalline ferroelectric materials that lead to higher leakage currents and reduced capacitance.

Innovation Solution

Employing an amorphous Hf1-xZrxO2 (0≤x≤1) layer with a specific d-orbital energy difference (3.5 eV<ΔE<3.8 eV) as a gate insulating layer, which reduces leakage current and enhances negative capacitance effects by utilizing ordered dipole clusters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stress or pressure

If crystalline ferroelectric materials are used as gate insulating layers, then capacitance is improved, but leakage current increases and power consumption increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidleakage current
Core Design Contradiction:
Stress or pressureVSLoss of energy

Solution Approach 1:

The patent changes the physical state parameter of the Hf1-xZrxO2 material from crystalline to amorphous phase. This parameter change fundamentally alters the material's electrical properties, achieving low leakage current characteristics while maintaining sufficient capacitance through the negative capacitance effect, thereby resolving the contradiction between capacitance and leakage current.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure combining amorphous Hf1-xZrxO2 thin film with specific dopants (such as Al, Si, Y, La, or Gd) and interfaces with channel layers and gate electrodes. This composite approach enables the material to achieve both low leakage current and high capacitance by leveraging the synergistic effects of the amorphous phase and dopant elements.

Inventive Principle:
Principle #40Composite materials

2Productivity

If device scaling is continued, then integration density is improved, but power consumption increases and performance deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent employs parameter changes in the gate insulating layer material (using amorphous Hf1-xZrxO2 with specific composition ratios and thicknesses) to achieve negative capacitance effects. This enables ultra-low power operation in scaled devices by reducing the energy required for switching, thus allowing continued scaling without proportional increases in power consumption.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If device scaling is continued, then integration density is improved, but leakage current increases

Engineering Contradiction:
Improveintegration densityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent changes the material phase from crystalline to amorphous and optimizes composition parameters of Hf1-xZrxO2 to achieve inherently low leakage current characteristics. The amorphous phase structure eliminates grain boundaries that cause leakage in crystalline materials, enabling high integration density with controlled leakage current.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The amorphous Hf1-xZrxO2 layer achieves lower power consumption and improved scalability by minimizing leakage current and maximizing capacitance, outperforming crystalline ferroelectric materials.

Implementation Method 1

Lower-power semiconductor devices are being developed to improve performance and/or overcome the scaling-down limitations by utilizing the negative capacitance phenomenon of ferroelectric thin films.

Methodology Applied
Scientific EffectNegative capacitance phenomenon:

Implementation Method 2

Employing an amorphous Hf1-xZrxO2 (0≤x≤1) layer with a specific d-orbital energy difference (3.5 eV<ΔE<3.8 eV) as a gate insulating layer, which reduces leakage current and enhances negative capacitance effects by utilizing ordered dipole clusters.

Methodology Applied
Scientific EffectOrdered dipole clusters:

Data Source

PatentUS20250220977A1Semiconductor device and electronic apparatus including the same
Publication Date: 2025.07.03 SAMSUNG ELECTRONICS CO LTD
  • US20250220977A1 patent drawing
  • US20250220977A1 patent drawing
  • US20250220977A1 patent drawing

AI summary

Provided are a semiconductor device and an electronic apparatus including the semiconductor device. The semiconductor device includes a substrate on which a channel layer is provided, an amorphous thin film provided above the substrate, and a gate electrode provided above the amorphous thin film. The amorphous thin film includes an amorphous Hf1-xZrxO2 (0≤x≤1) layer, and a difference value ΔE of a d-orbital with respect to Hf or Zr (an energy difference between an eg orbital and a t2g orbital) satisfies 3.5 eV≤ΔE&lt;3.8 eV.