Amorphous Interlayer for Conformal Semiconductor Diffusion

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Solution Overview

Problem

The formation of high-quality compound semiconductors, such as silicon germanium, is hindered by non-uniform deposition and diffusion issues due to the crystalline nature of epitaxially grown layers, leading to performance reductions in electronic devices.

Innovation Solution

A method involving the use of an amorphous or polycrystalline interlayer, which is trimmed to control thickness and prevent crystalline growth, allowing for a more conformal deposition of a source semiconductor layer that diffuses semiconductor species into the underlying material, thereby forming a high-quality compound semiconductor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If epitaxial deposition is used to form compound semiconductors, then deposition speed is improved, but uniformity and quality of the semiconductor layer deteriorate due to non-uniform growth and crystalline defects

Engineering Contradiction:
Improvedeposition speedVSAvoiduniformity of semiconductor layer
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

An amorphous or polycrystalline interlayer is introduced between the substrate and the source semiconductor layer. This interlayer acts as a mediator that prevents direct epitaxial growth, thereby eliminating non-uniform crystalline growth while still allowing diffusion of semiconductor species to form high-quality compound semiconductors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The crystal structure parameter of the intermediate layer is changed from crystalline to amorphous or polycrystalline state. This parameter change prevents epitaxial growth and ensures uniform diffusion of semiconductor species, resolving the contradiction between deposition speed and layer uniformity.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If a thick interlayer is used to prevent crystalline growth, then uniformity of deposition is improved, but diffusion of semiconductor species into the underlying material is hindered

Engineering Contradiction:
Improveconformality of depositionVSAvoiddiffusion efficiency of semiconductor species
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The thickness of the interlayer is precisely controlled within a specific range (e.g., 1-10 nm). This parameter optimization allows the interlayer to be thin enough to permit diffusion of semiconductor species while being thick enough to prevent direct epitaxial growth, thus resolving the contradiction between deposition uniformity and diffusion efficiency.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If direct deposition of source semiconductor layer on crystalline substrate is performed, then process complexity is reduced, but formation of defects and non-uniform structures occurs

Engineering Contradiction:
Improvenumber of process stepsVSAvoidquality of compound semiconductor
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

An amorphous or polycrystalline interlayer is introduced between the substrate and the source semiconductor layer. This interlayer acts as a mediator that prevents direct epitaxial growth, thereby eliminating non-uniform crystalline growth while still allowing diffusion of semiconductor species to form high-quality compound semiconductors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach facilitates the formation of high-quality compound semiconductors with improved uniformity and control over crystalline structure, enhancing the performance and throughput of semiconductor devices.

Implementation Method 1

The use of an amorphous or polycrystalline interlayer, which is trimmed to control thickness and prevent crystalline growth

Methodology Applied
Scientific EffectCrystalline structure control: Crystallisation

Implementation Method 2

a source semiconductor layer that diffuses semiconductor species into the underlying material, thereby forming a high-quality compound semiconductor

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

An oxide layer is formed on a surface of the silicon structure. Material forming the oxide layer is selectively removed to reduce the thickness of the oxide layer

Methodology Applied
Scientific EffectMaterial removal: Ablation

Data Source

PatentUS10141189B2Methods for forming semiconductors by diffusion
Publication Date: 2018.11.27 ASM IP HLDG BV
  • US10141189B2 patent drawing
  • US10141189B2 patent drawing
  • US10141189B2 patent drawing

AI summary

In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.