Amorphous Layer Dopant Diffusion Barrier in FinFET Substrate
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Solution Overview
Problem
In FinFET devices, the diffusion of dopants from the channel stop implant into the channel during high-temperature annealing degrades device performance due to random dopant fluctuation, leading to reduced carrier mobility and increased punch-through effects.
Innovation Solution
A method involving the formation of an amorphous layer in the substrate, which acts as an etch stop during fin formation and prevents dopant diffusion by disappearing during annealing, combined with a second etching process and insulating material deposition to create isolation regions between fins, thereby maintaining dopant activation without channel penetration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channel stop implant is performed to prevent punch through effect, then punch through effect is suppressed, but dopants diffuse into the channel during annealing, degrading device performance
Solution Approach 1:
An amorphous layer is introduced as an intermediary barrier between the channel stop implant region and the channel. This amorphous layer prevents dopant diffusion into the channel during annealing, while still allowing the channel stop implant to prevent punch-through effect. The amorphous layer acts as a mediator that decouples the two conflicting requirements.
Solution Approach 2:
The amorphous layer is formed in advance before the channel stop implant and annealing processes. This preliminary action creates a protective barrier that will be in place during the subsequent dopant implantation and thermal processing, preventing dopant diffusion before it can occur.
2Reliability
If high-temperature annealing is performed to activate dopants, then dopant activation is achieved, but dopants diffuse randomly into the channel, reducing carrier mobility
Solution Approach 1:
The amorphous layer serves as a thermal and diffusion barrier during the annealing process. It allows the necessary heat treatment to activate dopants while blocking the random diffusion of dopants into the channel region, thereby maintaining carrier mobility.
Solution Approach 2:
The amorphous layer changes its structural parameters during annealing - it transforms from an amorphous state to a crystalline state, and eventually disappears. This parameter change allows it to fulfill its protective function during annealing and then be removed to allow normal device operation.
3Manufacturing precision
If amorphous layer is formed to suppress dopant diffusion, then dopant diffusion is prevented, but the amorphous layer disappears after high-temperature annealing, allowing dopant diffusion
Solution Approach 1:
The amorphous layer undergoes a phase transition during the annealing process. It transforms from an amorphous phase to a crystalline phase, and eventually is consumed or removed. This phase transition is timed to occur during the annealing process when dopant activation is needed, allowing the layer to disappear after serving its protective function.
Solution Approach 2:
The physical and chemical parameters of the amorphous layer are changed during annealing through controlled heating. The layer's stability parameter is reduced at elevated temperatures, causing it to transform and disappear after preventing dopant diffusion during the critical annealing period.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses dopant diffusion into the channel, enhancing carrier mobility and preventing punch-through, thereby improving the stability and performance of FinFET devices.
Implementation Method 1
forming an amorphous layer in the substrate, which acts as an etch stop during fin formation and prevents dopant diffusion by disappearing during annealing
Implementation Method 2
performing an annealing process to activate dopants in the impurity region, wherein the amorphous layer disappears during the annealing process
Implementation Method 3
forming an amorphous layer in the substrate... performing a channel stop ion implantation process into the amorphous layer to form an impurity region
Data Source
AI summary
A semiconductor device includes a substrate, a plurality of fins on the substrate, and an isolation region between the fins. Each of the fins includes a semiconductor material region and an impurity region disposed in the semiconductor material region. The impurity region has an upper surface below an upper surface of the isolation region.


