Amorphous Resistor Layer Room Temperature Deposition
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Solution Overview
Problem
Existing resistor layers in semiconductor devices have limitations in terms of resistance uniformity and stability, particularly due to grain boundaries and external heating processes that can affect the resistance values and device performance.
Innovation Solution
An amorphous resistor layer is formed over a semiconductor substrate using a physical vapor deposition process at room temperature, without external heating, to maintain stability and improve resistance uniformity, utilizing materials like titanium nitride and silicon nitride, and subsequent nitride layer formation to enhance resistance properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If external heating processes are used to form resistor layers, then deposition can be achieved, but resistance uniformity and stability deteriorate due to grain boundary formation
Solution Approach 1:
The patent changes the temperature parameter from elevated heating temperature to room temperature deposition, fundamentally altering the thermal conditions to prevent grain boundary formation while maintaining deposition effectiveness
Solution Approach 2:
The patent replaces thermal energy input (heating) with physical vapor deposition mechanisms, substituting a thermal process with a physical deposition process that achieves resistor layer formation without grain boundary formation
2Reliability
If conventional resistor layers are used, then fabrication is simpler, but resistance stability deteriorates due to diffusion from other layers
Solution Approach 1:
The patent employs composite material structures including titanium nitride and silicon nitride layers with specific configurations that provide both diffusion barrier functionality and desired resistance characteristics, enhancing stability while managing fabrication complexity
Solution Approach 2:
The patent introduces intermediary barrier layers (titanium nitride, silicon nitride) between the resistor layer and adjacent layers, preventing direct diffusion and protecting resistance stability without requiring complete process redesign
3Manufacturing precision
If grain boundaries are present in resistor layers, then deposition is easier, but resistance uniformity deteriorates
Solution Approach 1:
The patent changes the microstructural parameter from crystalline grain structure to amorphous structure by controlling deposition conditions at room temperature, eliminating grain boundaries and achieving uniform resistance properties
Solution Approach 2:
The patent achieves homogeneous amorphous structure throughout the resistor layer, ensuring uniform composition and properties without the heterogeneity introduced by grain boundaries, directly improving resistance uniformity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in improved resistance uniformity and stability of the resistor layer, leading to enhanced performance and reliability of semiconductor device structures by preventing grain boundary formation and diffusion from other layers.
Implementation Method 1
An amorphous resistor layer is formed over a semiconductor substrate using a physical vapor deposition process
Data Source
AI summary
A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes transferring the substrate from a stage to a deposition chamber, and no heating operation is performed on the stage. The method also includes depositing a resistor layer on the substrate. The resistor layer may have a major structure that is amorphous.