Amorphous Silicon Bonding for Vertical Interconnects
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Solution Overview
Problem
The challenge in the electronics industry is to create efficient interconnects for vertically stacked semiconductor devices while minimizing substrate area usage, as increasing aspect ratios complicate both territory and electronic requirements of interconnects in conventional planar device scale-downs.
Innovation Solution
The semiconductor-metal-on-insulator (SMOI) structure involves bonding an amorphous silicon material to an insulator material with a conductive material in between, allowing for the formation of buried conductive interconnects that facilitate vertical device stacking with improved bond strength and reduced processing temperature, enabling efficient interconnects and self-aligned device formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If devices are formed vertically to reduce substrate area, then device density is improved, but interconnect accessibility and bonding complexity worsen
Solution Approach 1:
The conductive material is formed and patterned on the first substrate before bonding to the second substrate. This preliminary formation of interconnect structures eliminates the need for complex post-bonding interconnect fabrication, resolving the contradiction by preparing interconnects in advance when access is easier
Solution Approach 2:
The interconnect structure is divided into multiple segments: conductive material on first substrate, dielectric material layer, and conductive material on second substrate. This segmentation allows each layer to be optimized and formed independently, reducing overall bonding complexity while achieving vertical integration
2Ease of manufacture
If conventional bonding methods are used for vertical stacking, then device formation is simplified, but bond strength is insufficient and processing temperature is too high
Solution Approach 1:
The bonding process parameters are changed by using reduced pressure and/or increased temperature conditions that enable strong bonding without excessive heat. The conductive and dielectric materials are specifically selected to bond effectively under these modified parameters, achieving both strong bonds and process simplicity
Solution Approach 2:
Composite structures are used including conductive material combined with dielectric material in layered configurations. These composite material systems provide both mechanical bonding strength and electrical functionality, resolving the contradiction between ease of manufacture and bond strength
3Reliability
If separate electrical contacts are used for vertical interconnects, then electrical connectivity is achieved, but device complexity and cell size increase
Solution Approach 1:
The conductive material serves dual purposes: as part of the interconnect structure and as the electrical contact. By merging these two previously separate functions into a single integrated structure, electrical connectivity is maintained while device complexity and cell size are reduced
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of densely packed, vertically stacked semiconductor devices with reduced cell size, increased cache memory density, and improved reliability by eliminating the need for separate electrical contacts and minimizing exposure to high processing temperatures.
Implementation Method 1
an amorphous silicon material bonded to the insulator material
Data Source
AI summary
Methods for fabricating semiconductor-metal-on-insulator (SMOI) structures include forming an acceptor wafer including an insulator material on a first semiconductor substrate, forming a donor wafer including a conductive material and an amorphous silicon material on a second semiconductor substrate, and bonding the amorphous silicon material of the donor wafer to the insulator material of the acceptor wafer. SMOI structures formed from such methods are also disclosed, as are semiconductor devices including such SMOI structures.