Amorphous Silicon Crystallization via Segmented Film Stacks

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Solution Overview

Problem

Conventional methods for crystallizing amorphous silicon to form polycrystalline silicon films for transistors are inefficient, requiring temperature changes that degrade productivity and introducing phosphorus doping, which complicates the production of both N-type and P-type transistors and can lead to crystal defects.

Innovation Solution

A method involving the formation of a stacked structure with a second amorphous silicon film having a faster crystal growth rate than the first, followed by a crystallization treatment using a silicon raw material gas and a gas containing an impurity to suppress crystallization, allowing for the formation of crystallized silicon films with large grain sizes without degrading productivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If temperature switching is performed during amorphous silicon deposition to control crystal grain size, then large grain size is achieved, but productivity degrades due to temperature change time

Engineering Contradiction:
Improvecrystal grain sizeVSAvoidproductivity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The amorphous silicon film is divided into two stacked structures: a first amorphous silicon film with slower crystal growth rate and a second amorphous silicon film with faster crystal growth rate. This segmentation allows each layer to contribute differently to the overall crystallization process, enabling large grain size without requiring temperature switching during deposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first amorphous silicon film is prepared in advance with properties that promote slow crystal growth, creating a foundation layer that will later serve as a template for controlled crystallization. This preliminary preparation eliminates the need for temperature switching during the actual deposition process, maintaining productivity while achieving large grain size.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If phosphorus doping is increased to increase grain size, then large grain size is achieved, but only N-type polycrystalline silicon film is obtained, requiring additional processing to obtain P-type transistors

Engineering Contradiction:
Improvegrain sizeVSAvoidtransistor type control
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of using phosphorus doping to control grain size, the invention changes the approach by using a stacked structure of amorphous silicon films with different crystal growth rates. This parameter change eliminates the need for heavy phosphorus doping, allowing grain size control without fixing the transistor type, thus enabling flexible production of both N-type and P-type transistors.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If phosphorus doping is performed to increase grain size, then large grain size is achieved, but crystal defects may be introduced

Engineering Contradiction:
Improvegrain sizeVSAvoidcrystal defect
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The first amorphous silicon film acts as an intermediary layer that controls the crystallization process. By having the second amorphous silicon film crystallize on top of this carefully prepared foundation, the system achieves large grain size without introducing the crystal defects that would result from heavy phosphorus doping.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the production of single crystalline regions with large grain sizes, improving carrier mobility in semiconductor devices while maintaining productivity and allowing for easy determination of transistor type without introducing crystal defects.

Implementation Method 1

supplying a silicon raw material gas and a gas containing an impurity for suppressing the crystallization of the amorphous silicones onto a surface to be processed

Methodology Applied
Scientific EffectCrystallization suppression: Metastability

Implementation Method 2

performing a crystallization treatment on amorphous silicon films formed on the surface to be processed to crystallize the amorphous silicones contained in the amorphous silicon films

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS9540743B2Amorphous silicon crystallizing method, crystallized silicon film forming method, semiconductor device manufacturing method and film forming apparatus
Publication Date: 2017.01.10 TOKYO ELECTRON LTD
  • US9540743B2 patent drawing
  • US9540743B2 patent drawing
  • US9540743B2 patent drawing

AI summary

There is provided a method of crystallizing amorphous silicones, which includes: forming a stacked structure of a second amorphous silicon film followed by a first amorphous silicon film on an underlay film, the second amorphous silicon film having a faster crystal growth rate than the first amorphous silicon film; and performing a crystallization treatment on the stacked structure to crystallize silicones contained in at least the second amorphous silicon film.