Amorphous Silicon Deposition Rate Control for Solar Cell Interface
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Solution Overview
Problem
Existing solar cell manufacturing methods result in the crystallization of silicon, leading to reduced open-circuit voltage due to deteriorated interface characteristics, and increase manufacturing costs with high-pressure processes.
Innovation Solution
A method of depositing intrinsic amorphous silicon layers on semiconductor substrates at specific rates (0.5 nm/sec to 2.0 nm/sec) and power densities (60 mW/cm² to 150 mW/cm²) to prevent silicon crystal formation, using a hydrogen to silane gas ratio of 1:1 to 1:100, and forming conductive regions with transparent oxide electrodes to enhance solar cell performance without high-pressure conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If amorphous silicon is deposited on the surface of the semiconductor substrate, then the emitter region or back surface field region is formed to improve output voltage, but silicon crystals are formed in the amorphous silicon layer due to epitaxial growth along the crystal orientation of the substrate surface, deteriorating interface characteristics and reducing open-circuit voltage
Solution Approach 1:
The invention changes the deposition parameters by controlling the deposition rate to 0.5-2.0 nm/sec and power density to 60-150 mW/cm², which prevents epitaxial growth and maintains amorphous structure of the silicon layer, thereby avoiding crystal formation and preserving interface characteristics while forming the desired conductive regions
Solution Approach 2:
The invention applies preliminary anti-action by depositing an intrinsic amorphous silicon layer first to prevent epitaxial growth before depositing the amorphous silicon layer containing impurities, thus preventing crystal formation in advance and protecting the interface characteristics from deterioration
2Manufacturing precision
If the pressure of the amorphous silicon layer is increased to prevent crystallization, then silicon crystal formation is reduced, but the manufacturing cost excessively increases due to the cost required to match the process conditions
Solution Approach 1:
The invention changes the deposition parameters by controlling the deposition rate to 0.5-2.0 nm/sec and power density to 60-150 mW/cm², which prevents epitaxial growth and maintains amorphous structure of the silicon layer, thereby avoiding crystal formation and preserving interface characteristics while forming the desired conductive regions
Solution Approach 2:
The invention uses a standard deposition process with controlled parameters rather than expensive high-pressure equipment, achieving the desired amorphous layer quality through parameter optimization instead of costly process conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents silicon crystal growth, reduces defect density, and increases open-circuit voltage while maintaining low manufacturing costs by controlling deposition parameters, resulting in improved solar cell efficiency and characteristics.
Implementation Method 1
a portion of amorphous silicon was epitaxial grown and crystallized along a crystal orientation of the surface of the semiconductor substrate due to material properties of the semiconductor substrate having a crystalline structure
Implementation Method 2
depositing an amorphous silicon layer containing impurities on the intrinsic amorphous silicon layer
Data Source
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AI summary
A method of manufacturing a solar cell is disclosed. The method of manufacturing the solar cell includes depositing an intrinsic amorphous silicon layer (111, 112) on a surface of a semiconductor substrate (110), depositing an amorphous silicon layer containing impurities on the intrinsic amorphous silicon layer to form a conductive region (120, 170), and forming an electrode (131, 132, 140, 150) electrically connected to the conductive region. The depositing of the intrinsic amorphous silicon layer includes depositing the intrinsic amorphous silicon on the surface of the semiconductor substrate at a deposition rate of 0.5 nm/sec to 2.0 nm/sec.