Amorphous Silicon Gate Etching via Single-Material Auxiliary Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The current semiconductor manufacturing process for forming amorphous silicon gates in fin field-effect transistors is complex, with difficulty in controlling the etching process and achieving a flat surface, leading to potential electrical mismatches and reduced device performance due to the use of multiple materials requiring simultaneous etching.
Innovation Solution
A method involving the formation of an etching auxiliary layer with a flat upper surface made of a single material, using a silicon buffer layer and silicon oxide layer, which is planarized and converted to maintain morphology, allowing for accurate control of the amorphous silicon layer thickness through isotropic etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple materials are used to form the amorphous silicon gate layer, then the gate thickness control is improved, but the etching process complexity increases
Solution Approach 1:
The gate structure is segmented into multiple layers with different materials (silicon nitride layer, silicon oxide layer, and amorphous silicon layer), each serving specific functions. This segmentation allows precise thickness control of each layer through selective etching processes while maintaining overall gate thickness precision.
Solution Approach 2:
A silicon nitride intermediate layer is introduced between the silicon oxide layer and the amorphous silicon layer. This intermediate layer acts as a mediator that facilitates controlled etching by providing a distinct etching stop layer, enabling precise thickness control without requiring complex simultaneous etching of multiple materials.
2Manufacturing precision
If multiple materials are etched simultaneously to define gate height, then the gate thickness control is improved, but the loading effect increases
Solution Approach 1:
The etching process is segmented into multiple sequential steps, each targeting a specific layer (silicon oxide layer first, then silicon nitride layer, and finally amorphous silicon layer). This segmentation eliminates the loading effect by preventing simultaneous etching of multiple materials, as each etching step operates on a single material type with uniform properties.
Solution Approach 2:
The silicon oxide and silicon nitride layers are formed as preliminary protective and sacrificial layers before the final amorphous silicon gate layer is etched. These preliminary layers are selectively removed in controlled steps to define the gate height, reducing the loading effect on the final etching process by pre-establishing etching stops and protection schemes.
3Manufacturing precision
If complex multi-material etching is performed, then the gate thickness precision is improved, but the device yield decreases
Solution Approach 1:
The complex multi-material etching is segmented into multiple simple sequential etching steps, each with a single target material. This reduces process complexity and variability, improving device yield while maintaining gate thickness precision through cumulative control of each simplified step.
Solution Approach 2:
The silicon nitride layer serves as an intermediary etching stop layer that simplifies the etching process by providing a clear termination point. This intermediary layer enables precise thickness control through a simpler process, thereby improving device yield by reducing process variability and electrical mismatches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the etching process, improves the flatness of the amorphous silicon layer, and enables precise thickness control, enhancing the performance of fin field-effect transistors by reducing the complexity of multi-material etching and loading effects.
Implementation Method 1
converting the material of the first layer into the material of the second layer
Data Source
AI summary
A method for manufacturing a semiconductor device comprising: providing a substrate, wherein an amorphous silicon layer is formed on the substrate; forming an etching auxiliary layer on the amorphous silicon layer, wherein the upper surface of the etching auxiliary layer is flat, and the etching auxiliary layer is made of a single material; and etching the amorphous silicon layer and the etching auxiliary layer to obtain an amorphous silicon layer with a target thickness, wherein the upper surface of the etched amorphous silicon layer is flat.