Amorphous Silicon Sacrificial Layer for Preserving Metal Gate Height
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Solution Overview
Problem
As the minimum feature sizes in semiconductor devices are reduced, challenges arise in maintaining the height of metal gates during the semiconductor fabrication process, particularly due to silicidation effects on sacrificial layers.
Innovation Solution
The use of an amorphous silicon (a-Si) sacrificial layer instead of silicon nitride (SiN), combined with a nitrogen plasma doping process, reduces the thickness of silicide formed on the a-Si layer, thereby preserving the metal gate height during subsequent planarization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a silicon nitride (SiN) sacrificial layer is used, then the sacrificial layer provides adequate structural support during fabrication, but excessive silicidation occurs on the layer causing loss of metal gate height
Solution Approach 1:
The patent changes the material parameter of the sacrificial layer from silicon nitride to amorphous silicon, which fundamentally alters the silicidation behavior. Amorphous silicon forms significantly less silicide compared to silicon nitride, thereby preserving metal gate height. This material substitution directly addresses the contradiction by changing the chemical composition parameter of the sacrificial layer.
Solution Approach 2:
The amorphous silicon sacrificial layer is designed as a disposable element that is intentionally removed after serving its temporary purpose of defining the gate structure. Its temporary nature and ease of removal make it an ideal sacrificial material that minimizes unwanted side effects like excessive silicidation while fulfilling its structural role during fabrication.
2Productivity
If the minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but maintaining metal gate height becomes more difficult due to increased silicidation effects
Solution Approach 1:
By changing the sacrificial layer material from silicon nitride to amorphous silicon, the patent reduces the silicidation rate, which becomes increasingly important as feature sizes shrink. The reduced silicide formation on amorphous silicon allows better preservation of metal gate height even at smaller dimensions, enabling higher integration density without sacrificing manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively minimizes the loss of metal gate height, reduces gate resistance, and enhances the integration density of semiconductor components by maintaining a greater gate height and reducing silicidation.
Implementation Method 1
nitrogen plasma doping process
Implementation Method 2
performing a nitridation process on the hard mask
Data Source
AI summary
A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode. The bottom mask remains over the source/drain region during the nitridation process and is removed after the nitridation. The method further includes forming a silicide over the source/drain region after removing the bottom mask.