Amorphous Silicon Gate Oxidation via In-Situ Steam Generation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current DRAM units with buried gate structures face limitations in fabrication capability, affecting performance and reliability due to challenges in capacitor leakage and integration density.
Innovation Solution
A method involving the formation of a shallow trench isolation, deposition of an amorphous silicon layer, transformation into a silicon dioxide layer via in-situ steam generation, and subsequent deposition of a barrier and conductive layer to improve gate structure integrity and reduce substrate consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional oxidation processes are used to form silicon dioxide layer, then the oxidation is incomplete and substrate is overconsumed, but using in-situ steam generation (ISSG) process improves oxidation completeness and controls substrate consumption
Solution Approach 1:
The patent changes the oxidation parameters by using in-situ steam generation (ISSG) process instead of conventional oxidation. This involves controlling the steam generation in-situ to achieve complete oxidation of the amorphous silicon layer while precisely controlling the substrate consumption, transforming the oxidation process parameters to resolve the contradiction between oxidation completeness and substrate consumption control.
Solution Approach 2:
The patent replaces the conventional oxidation mechanism with an in-situ steam generation mechanism. Instead of using external oxidation sources, the system generates steam in-situ within the reaction chamber, allowing for more precise control over the oxidation process and substrate interaction, thereby achieving both complete oxidation and controlled substrate consumption.
2Reliability
If DRAM units use buried gate structures to reduce capacitor leakage, then carrier channel length increases, but fabrication capability remains limited affecting performance and reliability
Solution Approach 1:
The patent segments the fabrication process into distinct sequential steps: forming amorphous silicon layer, in-situ steam generation oxidation, barrier layer deposition, and conductive layer deposition. This segmentation of the complex buried gate structure fabrication into manageable stages improves manufacturability while maintaining the reliability benefits of longer carrier channel length for reduced capacitor leakage.
Solution Approach 2:
The patent performs preliminary actions by first forming the amorphous silicon layer and then using in-situ steam generation to create a high-quality silicon dioxide interface before subsequent layer depositions. This preliminary preparation of the interface ensures better oxidation completeness and sets the foundation for improved device performance and reliability in the buried gate structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the strength and control of the silicon dioxide layer, improving the reliability and performance of DRAM devices by preventing substrate overconsumption and allowing for higher integration density.
Implementation Method 1
performing an oxidation process to transform the amorphous silicon layer into a silicon dioxide layer
Data Source
AI summary
A method for fabricating semiconductor device includes the steps of: forming a shallow trench isolation (STI) in the substrate; removing part of the STI to form a trench in a substrate; forming an amorphous silicon layer in the trench and on the STI; performing an oxidation process to transform the amorphous silicon layer into a silicon dioxide layer; and forming a barrier layer and a conductive layer in the trench.