Amorphous Silicon Light Shielding Layer for Array Substrate Fabrication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional fabrication methods of low temperature polycrystalline silicon display apparatuses require complex and inefficient patterning processes, involving up to 11 mask plates, which increases manufacturing costs and reduces fabrication efficiency.
Innovation Solution
A method is developed to fabricate an array substrate by forming a first amorphous silicon layer, a metal oxide layer, and a polycrystalline silicon layer, and patterning them in a single process, using a metal oxide layer to prevent heat and hydrogen transfer during crystallization, thereby reducing the need for a thick second buffer layer and simplifying the patterning process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication methods are used with multiple mask plates for patterning, then the polycrystalline silicon layer can be formed with adequate quality, but the manufacturing process becomes complex and inefficient requiring up to 11 mask plates
Solution Approach 1:
The patent combines the light shielding layer and active layer into a single integrated structure where the amorphous silicon layer serves dual purposes: as the light shielding layer when kept thin, and as the active layer when crystallized. This merging eliminates the need for separate patterning processes for both layers, reducing mask plate requirements from 11 to just 1-2 mask plates.
Solution Approach 2:
The amorphous silicon layer is designed to perform multiple functions: it provides light shielding when deposited at standard thickness, and serves as the precursor for the active layer when crystallized. This multi-functionality reduces the number of separate layers and patterning steps needed in conventional processes.
2Manufacturing precision
If a thick second buffer layer is used to prevent heat transfer during crystallization, then the polycrystalline silicon layer quality is maintained, but the device structure becomes more complex and fabrication steps increase
Solution Approach 1:
The patent introduces a metal oxide layer as an intermediary barrier between the amorphous silicon layer and the polycrystalline silicon layer. This metal oxide layer effectively prevents hydrogen transfer during the crystallization process, replacing the need for a thick second buffer layer and simplifying the overall structure.
Solution Approach 2:
The patent changes the material parameter by introducing a metal oxide layer with specific properties (hydrogen barrier characteristics) rather than relying on thickness parameters of buffer layers. This material substitution achieves the same protective function with a thinner, more manageable layer structure.
3Manufacturing precision
If multiple separate layers and patterning steps are used for light shielding and active layers, then each layer can be optimized independently, but the manufacturing cost increases and fabrication efficiency decreases
Solution Approach 1:
The patent merges the light shielding layer and active layer formation into a single crystallization process. By keeping the amorphous silicon layer thin (first thickness range) and crystallizing it in-situ, the process simultaneously creates both functional layers, eliminating multiple patterning steps and improving fabrication efficiency.
Solution Approach 2:
The patent performs preliminary action by depositing the amorphous silicon layer at a controlled thin thickness that pre-determines its dual function. This preliminary thickness control enables the layer to serve as both light shielding and active layer precursor, streamlining subsequent processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of mask plates required, lowers manufacturing costs, and enhances fabrication efficiency by allowing the light shielding and active layers to be formed in one step, while maintaining the quality of the polycrystalline silicon layer.
Implementation Method 1
using a metal oxide layer to prevent heat and hydrogen transfer during crystallization
Implementation Method 2
using a metal oxide layer to prevent heat and hydrogen transfer during crystallization
Implementation Method 3
crystallizing the second amorphous silicon layer to form the polycrystalline silicon layer
Data Source
AI summary
The present application provides an array substrate. The array substrate includes a base substrate; a light shielding layer on the base substrate; a metal oxide layer on a side of the light shielding layer distal to the base substrate; and an active layer on a side of the metal oxide layer distal to the base substrate. The metal oxide layer includes a metal oxide material. The light shielding layer includes amorphous silicon. An orthographic projection of the light shielding layer on the base substrate substantially overlaps with an orthographic projection of the active layer on the base substrate, and substantially overlaps with an orthographic projection of the metal oxide layer on the base substrate.