Amorphous Silicon Strip Crystallization for LTPS Uniformity
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Solution Overview
Problem
Low temperature polycrystalline silicon thin film transistors (LTPS TFTs) used in AM-OLED displays face challenges in maintaining crystal grain uniformity, limiting the yield of large area displays due to variations in crystal grain size and orientation.
Innovation Solution
A method involving the formation of trenches and amorphous silicon strips on a substrate, followed by heat treatment using excimer laser annealing to induce lateral grain growth, creating single crystal-grained silicon channels with artificially adjusted crystallization direction, thereby improving uniformity and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If excimer laser annealing is applied for crystallizing silicon to manufacture LTPS TFT, then high mobility and high reliability are achieved, but crystal grain uniformity cannot be maintained at a certain level when applied to large area display
Solution Approach 1:
The patent divides the continuous amorphous silicon layer into discrete strips separated by trenches. Each strip is independently crystallized with controlled grain growth from specific nucleation sites at the trench edges, ensuring uniform crystal grain structure across the entire large area display while maintaining the high mobility benefits of LTPS TFTs
Solution Approach 2:
The patent creates different structural zones: trenches serve as crystal nucleation sites, amorphous silicon strips are the crystallization regions, and spacers protect strip edges. This local differentiation ensures that each region performs its specific function to achieve overall crystal grain uniformity across the large area display
2Ease of manufacture
If conventional crystallization method is used, then manufacturing process is simple, but crystal grain uniformity varies and yield cannot be increased for large area display
Solution Approach 1:
The patent performs preliminary actions by forming trenches and spacers before crystallization to pre-establish crystal nucleation sites and protect strip edges. This preliminary structuring ensures that during subsequent crystallization, grains grow uniformly from controlled locations, increasing yield for large area displays while adding only moderate process complexity
Solution Approach 2:
The patent introduces the dimensional concept of trenches (vertical structures) and spacers (lateral protective structures) to control crystal grain growth in the horizontal plane. This multi-dimensional approach enables precise control of grain uniformity across large areas without significantly complicating the overall manufacturing flow
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of semiconductor device characteristics and increases product yield by artificially arranging crystal nucleation sites and promoting lateral growth of single crystal-grained silicon channels, applicable to both large and small area AM-OLED displays without requiring new equipment.
Implementation Method 1
crystallizing the amorphous silicon strips by heat treatment to form polycrystalline silicon strips, wherein a crystal nucleation site is formed in each of the amorphous silicon layers in the trench, and then lateral grain growth is induced from each of the crystal nucleation sites in a longitudinal direction of each of the amorphous silicon strips
Implementation Method 2
Excimer laser annealing may be applied as the heat treatment and completely melt amorphous silicon up to a portion of the amorphous silicon inside the trench
Data Source
AI summary
Provided is a method of manufacturing a semiconductor device, the method including: forming an insulating layer on a substrate; forming a trench, which extends in a first direction parallel with the plane of the substrate, to a preset depth in the insulating layer in a second direction perpendicular to the plane of the substrate; forming a plurality of amorphous silicon strips, which extend from the inside of the trench in the second direction intersecting with the first direction, in parallel in a first direction; forming a spacer on a side of the amorphous silicon strip by using an insulating material layer; and crystallizing the amorphous silicon strip by heat treatment, wherein crystal nucleation sites are formed in the amorphous silicon layer in the trench, and a polycrystalline silicon layer is formed by lateral grain growth in a longitudinal direction of the amorphous silicon strip from the crystal nucleation site.