Amorphous Silicon TFT Stress Management in Low Power LCDs
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Solution Overview
Problem
Amorphous silicon hydrogenated thin-film transistor (a-Si:H TFT) technology in liquid crystal displays faces challenges with electrical instability, particularly due to threshold voltage shifts and subthreshold slope degradations, limiting the integration of driver circuits and increasing power consumption, which is a barrier for achieving long operational life and low power consumption in mobile and low-cost displays.
Innovation Solution
The method involves operating the display circuit with a plurality of pixel circuits, each comprising at least two transistors in series, where a negative gate bias voltage is applied between frame loading operations to hold a charge and a stress-reducing gate voltage is applied at a rate higher than the frame rate to reduce stress accumulation, and applying negative gate bias voltages to row and column select transistors to compensate for positive stress during frame loading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If negative gate bias voltage is applied continuously to hold charge between frame loading operations, then charge holding capability is improved, but stress accumulation increases reducing device reliability
Solution Approach 1:
The patent applies periodic alternating gate voltages (between negative and less negative values) during the charge holding period between frame loading operations. This periodic voltage modulation prevents continuous negative stress accumulation on the a-Si:H TFT devices while maintaining sufficient charge holding capability, thereby extending operational life without excessive stress buildup.
Solution Approach 2:
The patent dynamically adjusts the gate voltage parameter over time, alternating between negative gate bias voltage (for charge holding) and less negative gate voltage (for stress reduction). This time-varying parameter change allows the system to balance charge retention requirements against stress accumulation constraints, improving overall device reliability.
2Device complexity
If a-Si:H TFT transistors are used with high duty cycle operation, then integration of driver circuits is improved, but threshold voltage shifts and subthreshold slope degradations increase
Solution Approach 1:
The patent implements periodic stress reduction cycles where alternating gate voltages are applied during non-frame periods. This periodic action allows driver circuits to operate at high duty cycles for integration benefits while periodically relieving stress accumulation that causes threshold voltage shifts and subthreshold slope degradations, maintaining electrical stability.
Solution Approach 2:
The patent applies preliminary stress reduction actions by alternating the gate voltage to less negative values during intervals between frame loading operations. This preemptive stress relief prevents excessive threshold voltage shifts and subthreshold slope degradations before they accumulate to problematic levels, enabling reliable high-duty-cycle driver circuit operation.
3Use of energy by moving object
If frame rate is reduced to save power in static display applications, then power consumption is improved, but negative stress accumulation increases due to longer negative voltage stretches
Solution Approach 1:
The patent applies periodic alternating gate voltages during the extended intervals between frames at low frame rates. This periodic modulation interrupts continuous negative voltage stretches, preventing excessive negative stress accumulation even when frames are displayed infrequently, thereby enabling ultra-low power static display operation without compromising device reliability.
Solution Approach 2:
The patent dynamically changes the gate voltage parameter during non-frame periods at reduced frame rates, alternating between negative bias (for charge holding) and less negative values (for stress prevention). This time-varying parameter control allows the display to operate at very low power consumption while maintaining electrical stability despite long intervals between updates.
Data Source
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AI summary
Described herein are systems and methods for stress avoidance and stress compensation in low power Liquid Crystal Displays (LCDs). In an exemplary embodiment, two or more transistors in series are used to hold charge on an LCD pixel. To avoid negative stress on the transistors, the transistors are alternately driven to an "off" state so that no one transistor sees a long "off" time. In another embodiment, stress on transistors of a display circuit are measured and controlled negative stress is applied to the transistors to compensate for the measured stress.